Microchip Technology DM240015 Data Sheet
PIC24FJ128GC010 FAMILY
DS30009312B-page 390
2012-2013 Microchip Technology Inc.
FIGURE 32-1:
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR
CAPACITANCE MEASUREMENT
CAPACITANCE MEASUREMENT
32.2
Measuring Time
Time measurements on the pulse width can be similarly
performed using the A/D module’s Internal Capacitor
(C
performed using the A/D module’s Internal Capacitor
(C
AD
) and a precision resistor for current calibration.
displays the external connections used for
time measurements, and how the CTMU and A/D
modules are related in this application. This example
also shows both edge events coming from the external
CTEDGx pins, but other configurations using internal
edge sources are possible.
modules are related in this application. This example
also shows both edge events coming from the external
CTEDGx pins, but other configurations using internal
edge sources are possible.
32.3
Pulse Generation and Delay
The CTMU module can also generate an output pulse
with edges that are not synchronous with the device’s
system clock. More specifically, it can generate a pulse
with a programmable delay from an edge event input to
the module.
with edges that are not synchronous with the device’s
system clock. More specifically, it can generate a pulse
with a programmable delay from an edge event input to
the module.
When the module is configured for pulse generation
delay by setting the TGEN bit (CTMUCON1<12>), the
internal current source is connected to the B input of
Comparator 2. A capacitor (C
delay by setting the TGEN bit (CTMUCON1<12>), the
internal current source is connected to the B input of
Comparator 2. A capacitor (C
DELAY
) is connected to
the Comparator 2 pin, C2INB, and the Comparator
Voltage Reference, CV
Voltage Reference, CV
REF
, is connected to C2INA.
CV
REF
is then configured for a specific trip point. The
module begins to charge C
DELAY
when an edge event
is detected. When C
DELAY
charges above the CV
REF
trip point, a pulse is output on CTPLS. The length of the
pulse delay is determined by the value of C
pulse delay is determined by the value of C
DELAY
and
the CV
REF
trip point.
pulse generation, as well as the relationship of the
different analog modules required. While CTED1 is
shown as the input pulse source, other options are
available. A detailed discussion on pulse generation
with the CTMU module is provided in the “PIC24F
Family Reference Manual”
different analog modules required. While CTED1 is
shown as the input pulse source, other options are
available. A detailed discussion on pulse generation
with the CTMU module is provided in the “PIC24F
Family Reference Manual”
.
PIC24F Device
A/D Converter
CTMU
ANx
C
APP
Output Pulse
EDG1
EDG2
R
PR
AN
Y
Timer1
Current Source