Microchip Technology DM240015 Data Sheet
2012-2013 Microchip Technology Inc.
DS30009312B-page 461
PIC24FJ128GC010 FAMILY
INDEX
A
A/D
Operation .................................................................. 347
Registers................................................................... 348
Registers................................................................... 348
AC Characteristics
12-Bit Pipeline A/D Module ....................................... 442
16-Bit Sigma-Delta A/D Converter ............................ 445
CLKO and I/O Timing Requirements ........................ 440
External Clock Timing ............................................... 438
Internal RC Accuracy ................................................ 439
Load Conditions and Requirements
16-Bit Sigma-Delta A/D Converter ............................ 445
CLKO and I/O Timing Requirements ........................ 440
External Clock Timing ............................................... 438
Internal RC Accuracy ................................................ 439
Load Conditions and Requirements
PLL Clock Timing...................................................... 439
RC Oscillator Start-up Time ...................................... 439
Reset and Brown-out Reset Requirements .............. 441
RC Oscillator Start-up Time ...................................... 439
Reset and Brown-out Reset Requirements .............. 441
B
Block Diagrams
12-Bit Pipeline A/D Converter ................................... 349
16-Bit Asynchronous Timer3 and Timer5 ................. 219
16-Bit Synchronous Timer2 and Timer4 ................... 219
16-Bit Timer1 Module................................................ 215
32-Bit Timer2/3 and Timer4/5 ................................... 218
Accessing Program Memory Using
16-Bit Asynchronous Timer3 and Timer5 ................. 219
16-Bit Synchronous Timer2 and Timer4 ................... 219
16-Bit Timer1 Module................................................ 215
32-Bit Timer2/3 and Timer4/5 ................................... 218
Accessing Program Memory Using
Addressing for Table Registers................................... 91
Analog Block (overview) ........................................... 342
BDT Mapping for Endpoint Buffering Modes ............ 270
CALL Stack Frame...................................................... 77
Comparator Voltage Reference ................................ 387
CPU Programmer’s Model .......................................... 41
CRC Module ............................................................. 335
CRC Shift Engine Detail............................................ 335
CTMU Connections and Internal Configuration for
Analog Block (overview) ........................................... 342
BDT Mapping for Endpoint Buffering Modes ............ 270
CALL Stack Frame...................................................... 77
Comparator Voltage Reference ................................ 387
CPU Programmer’s Model .......................................... 41
CRC Module ............................................................. 335
CRC Shift Engine Detail............................................ 335
CTMU Connections and Internal Configuration for
Data Signal Modulator .............................................. 299
DMA Controller ........................................................... 83
EDS Address Generation for Read............................. 75
EDS Address Generation for Write ............................. 76
High/Low-Voltage Detect (HLVD) ............................. 397
I
DMA Controller ........................................................... 83
EDS Address Generation for Read............................. 75
EDS Address Generation for Write ............................. 76
High/Low-Voltage Detect (HLVD) ............................. 397
I
2
LCD Controller.......................................................... 315
MCLR Pin Connections Example ............................... 34
On-Chip Regulator Connections............................... 409
Output Compare x (16-Bit Mode) ............................. 228
Output Compare x (Double-Buffered,
MCLR Pin Connections Example ............................... 34
On-Chip Regulator Connections............................... 409
Output Compare x (16-Bit Mode) ............................. 228
Output Compare x (Double-Buffered,
PCI24FJ128GC010 Family (General) ........................ 18
PIC24F CPU Core ...................................................... 40
PSV Operation (Lower Word)..................................... 82
PSV Operation (Upper Word)..................................... 82
Recommended Minimum Connections....................... 33
Reset System ............................................................. 97
RTCC........................................................................ 323
Shared I/O Port Structure ......................................... 183
Sigma-Delta A/D Converter ...................................... 369
Simplified Single DAC .............................................. 375
Single Operational Amplifier ..................................... 377
SPIx Master, Frame Master Connection .................. 246
SPIx Master, Frame Slave Connection .................... 246
SPIx Master/Slave Connection
PIC24F CPU Core ...................................................... 40
PSV Operation (Lower Word)..................................... 82
PSV Operation (Upper Word)..................................... 82
Recommended Minimum Connections....................... 33
Reset System ............................................................. 97
RTCC........................................................................ 323
Shared I/O Port Structure ......................................... 183
Sigma-Delta A/D Converter ...................................... 369
Simplified Single DAC .............................................. 375
Single Operational Amplifier ..................................... 377
SPIx Master, Frame Master Connection .................. 246
SPIx Master, Frame Slave Connection .................... 246
SPIx Master/Slave Connection
SPIx Master/Slave Connection (Standard Mode)..... 245
SPIx Module (Enhanced Mode)................................ 239
SPIx Module (Standard Mode) ................................. 238
SPIx Slave, Frame Master Connection .................... 246
SPIx Slave, Frame Slave Connection ...................... 246
System Clock............................................................ 159
Triple Comparator Module........................................ 381
UARTx (Simplified) ................................................... 257
USB OTG Bus-Powered Interface Example............. 267
USB OTG Dual Power Mode Example..................... 267
USB OTG Host Interface Example ........................... 268
USB OTG Interface Example ................................... 268
USB OTG Interrupt Funnel ....................................... 274
USB OTG Module..................................................... 266
USB OTG Self-Power Only Mode ............................ 267
USB PLL................................................................... 167
Watchdog Timer (WDT)............................................ 410
SPIx Module (Enhanced Mode)................................ 239
SPIx Module (Standard Mode) ................................. 238
SPIx Slave, Frame Master Connection .................... 246
SPIx Slave, Frame Slave Connection ...................... 246
System Clock............................................................ 159
Triple Comparator Module........................................ 381
UARTx (Simplified) ................................................... 257
USB OTG Bus-Powered Interface Example............. 267
USB OTG Dual Power Mode Example..................... 267
USB OTG Host Interface Example ........................... 268
USB OTG Interface Example ................................... 268
USB OTG Interrupt Funnel ....................................... 274
USB OTG Module..................................................... 266
USB OTG Self-Power Only Mode ............................ 267
USB PLL................................................................... 167
Watchdog Timer (WDT)............................................ 410
C
C Compilers
Charge Time Measurement Unit. See CTMU.
Code Examples
Code Examples
Basic Clock Switching .............................................. 166
Configuring UART1 Input/Output
Configuring UART1 Input/Output
EDS Read in Assembly Code..................................... 75
EDS Write in Assembly Code..................................... 76
Erasing a Program Memory Block (Assembly)........... 94
Erasing a Program Memory Block (C Language)....... 95
Initiating a Programming Sequence ........................... 95
Loading the Write Buffers ........................................... 95
Port Write/Read in Assembly.................................... 191
Port Write/Read in C................................................. 191
PWRSAV Instruction Syntax .................................... 172
Setting the RTCWREN Bit........................................ 324
Single-Word Flash Programming ............................... 96
Single-Word Flash Programming (C Language) ........ 96
The Repeat Sequence.............................................. 175
EDS Write in Assembly Code..................................... 76
Erasing a Program Memory Block (Assembly)........... 94
Erasing a Program Memory Block (C Language)....... 95
Initiating a Programming Sequence ........................... 95
Loading the Write Buffers ........................................... 95
Port Write/Read in Assembly.................................... 191
Port Write/Read in C................................................. 191
PWRSAV Instruction Syntax .................................... 172
Setting the RTCWREN Bit........................................ 324
Single-Word Flash Programming ............................... 96
Single-Word Flash Programming (C Language) ........ 96
The Repeat Sequence.............................................. 175