Microchip Technology MA330020 Data Sheet
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DS70000318G-page 116
2008-2014 Microchip Technology Inc.
REGISTER 7-16:
IEC5: INTERRUPT ENABLE CONTROL REGISTER 5
R/W-0
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
PWM2IE
PWM1IE
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
PWM2IE: PWM2 Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 14
PWM1IE: PWM1 Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 13-0
Unimplemented: Read as ‘0’