Microchip Technology MA330020 Data Sheet
2008-2014 Microchip Technology Inc.
DS70000318G-page 391
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Timing Diagrams
Analog-to-Digital Conversion per Input ..................... 329
Brown-out Situations................................................... 94
External Clock........................................................... 301
High-Speed PWMx ................................................... 311
High-Speed PWMx Fault .......................................... 311
I/O ............................................................................. 304
I2Cx Bus Data (Master Mode) .................................. 324
I2Cx Bus Data (Slave Mode) .................................... 326
I2Cx Bus Start/Stop Bits (Master Mode) ................... 324
I2Cx Bus Start/Stop Bits Slave Mode) ...................... 326
Input Capture x (ICx)................................................. 309
OCx/PWMx ............................................................... 310
Output Compare x (OCx) .......................................... 309
Reset, Watchdog Timer, Oscillator Start-up Timer
Brown-out Situations................................................... 94
External Clock........................................................... 301
High-Speed PWMx ................................................... 311
High-Speed PWMx Fault .......................................... 311
I/O ............................................................................. 304
I2Cx Bus Data (Master Mode) .................................. 324
I2Cx Bus Data (Slave Mode) .................................... 326
I2Cx Bus Start/Stop Bits (Master Mode) ................... 324
I2Cx Bus Start/Stop Bits Slave Mode) ...................... 326
Input Capture x (ICx)................................................. 309
OCx/PWMx ............................................................... 310
Output Compare x (OCx) .......................................... 309
Reset, Watchdog Timer, Oscillator Start-up Timer
System Reset.............................................................. 93
Timer1, 2, 3 External Clock....................................... 307
Timer1, 2, 3 External Clock....................................... 307
Timing Requirements
10-Bit, High-Speed ADC Requirements.................... 329
External Clock................................................... 301, 345
I/O ............................................................................. 304
Input Capture x ......................................................... 309
Simple OCx/PWMx Mode ......................................... 345
SPIx Master Mode (CKE = 0) ................................... 339
SPIx Master Mode (Full-Duplex, CKE = 0,
External Clock................................................... 301, 345
I/O ............................................................................. 304
Input Capture x ......................................................... 309
Simple OCx/PWMx Mode ......................................... 345
SPIx Master Mode (CKE = 0) ................................... 339
SPIx Master Mode (Full-Duplex, CKE = 0,
SPIx Module Master Mode (CKE = 1)....................... 339
SPIx Module Slave Mode (CKE = 0)......................... 340
SPIx Module Slave Mode (CKE = 1)......................... 340
SPIx Slave Mode (Full-Duplex, CKE = 0,
SPIx Module Slave Mode (CKE = 0)......................... 340
SPIx Module Slave Mode (CKE = 1)......................... 340
SPIx Slave Mode (Full-Duplex, CKE = 0,
Timing Specifications
10-Bit High-Speed ADC Module ............................... 328
Auxiliary PLL Clock................................................... 302
Comparator Module.................................................. 330
DAC Module ............................................................. 330
DAC Output Buffer DC ............................................. 331
High-Speed PWMx Requirements............................ 311
I2Cx Bus Data Requirements (Master Mode)........... 325
I2Cx Bus Data Requirements (Slave Mode)............. 327
Output Compare x Requirements............................. 309
PLL Clock ......................................................... 302, 338
Reset, Watchdog Timer, Oscillator Start-up Timer,
Auxiliary PLL Clock................................................... 302
Comparator Module.................................................. 330
DAC Module ............................................................. 330
DAC Output Buffer DC ............................................. 331
High-Speed PWMx Requirements............................ 311
I2Cx Bus Data Requirements (Master Mode)........... 325
I2Cx Bus Data Requirements (Slave Mode)............. 327
Output Compare x Requirements............................. 309
PLL Clock ......................................................... 302, 338
Reset, Watchdog Timer, Oscillator Start-up Timer,
Simple OCx/PWMx Mode Requirements ................. 310
Timer1 External Clock Requirements ....................... 307
Timer2 External Clock Requirements ....................... 308
Timer3 External Clock Requirements ....................... 308
Timer1 External Clock Requirements ....................... 307
Timer2 External Clock Requirements ....................... 308
Timer3 External Clock Requirements ....................... 308
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