Microchip Technology MA330020 Data Sheet
2008-2014 Microchip Technology Inc.
DS70000318G-page 87
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
5.4.1
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
FLASH PROGRAM MEMORY
One row of program Flash memory can be
programmed at a time. To achieve this, it is necessary
to erase the 8-row erase page that contains the desired
row. The general process is:
programmed at a time. To achieve this, it is necessary
to erase the 8-row erase page that contains the desired
row. The general process is:
1.
Read eight rows of program memory
(512 instructions) and store in data RAM.
(512 instructions) and store in data RAM.
2.
Update the program data in RAM with the desired
new data.
new data.
3.
):
a)
Set the NVMOP<3:0> bits (NVMCON<3:0>) to
‘0010’ to configure for block erase. Set
the ERASE (NVMCON<6>) and WREN
(NVMCON<14>) bits.
‘0010’ to configure for block erase. Set
the ERASE (NVMCON<6>) and WREN
(NVMCON<14>) bits.
b)
Write the starting address of the page to be
erased into the TBLPAG and W registers.
erased into the TBLPAG and W registers.
c)
Write 0x55 to NVMKEY.
d)
Write 0xAA to NVMKEY.
e)
Set the WR bit (NVMCON<15>). The erase
cycle begins and the CPU stalls for the duration
of the erase cycle. When the erase is done, the
WR bit is cleared automatically.
cycle begins and the CPU stalls for the duration
of the erase cycle. When the erase is done, the
WR bit is cleared automatically.
4.
).
5.
Write the program block to Flash memory:
a)
Set the NVMOP<3:0> bits to ‘0001’ to
configure for row programming. Clear the
ERASE bit and set the WREN bit.
configure for row programming. Clear the
ERASE bit and set the WREN bit.
b)
Write 0x55 to the NVMKEY register.
c)
Write 0xAA to the NVMKEY register.
d)
Set the WR bit. The programming cycle begins
and the CPU stalls for the duration of the write
cycle. When the write to Flash memory is done,
the WR bit is cleared automatically.
and the CPU stalls for the duration of the write
cycle. When the write to Flash memory is done,
the WR bit is cleared automatically.
6.
Repeat Steps 4 and 5, using the next available
64 instructions from the block in data RAM by incre-
menting the value in the TBLPAG register, until all
512 instructions are written back to Flash memory.
64 instructions from the block in data RAM by incre-
menting the value in the TBLPAG register, until all
512 instructions are written back to Flash memory.
For protection against accidental operations, the write
initiate sequence for the NVMKEY register must be
used to allow any erase or program operation to
proceed. After the programming command has been
executed, the user application must wait for the pro-
gramming time until programming is complete. The two
instructions following the start of the programming
sequence should be NOPs, as shown in
initiate sequence for the NVMKEY register must be
used to allow any erase or program operation to
proceed. After the programming command has been
executed, the user application must wait for the pro-
gramming time until programming is complete. The two
instructions following the start of the programming
sequence should be NOPs, as shown in
.
EXAMPLE 5-1:
ERASING A PROGRAM MEMORY PAGE
; Set up NVMCON for block erase operation
MOV
#0x4042, W0
;
MOV
W0, NVMCON
; Initialize NVMCON
; Init pointer to row to be ERASED
MOV
#tblpage(PROG_ADDR), W0
;
MOV
W0, TBLPAG
; Initialize PM Page Boundary SFR
MOV
#tbloffset(PROG_ADDR), W0
; Initialize in-page EA[15:0] pointer
TBLWTL
W0, [W0]
; Set base address of erase block
DISI
#5
; Block all interrupts with priority <7
; for next 5 instructions
MOV
#0x55, W0
MOV
W0, NVMKEY
; Write the 55 key
MOV
#0xAA, W1
;
MOV
W1, NVMKEY
; Write the AA key
BSET
NVMCON, #WR
; Start the erase sequence
NOP
; Insert two NOPs after the erase
NOP
; command is asserted