Microchip Technology AC164112 Data Sheet
PIC16F72X/PIC16LF72X
DS41341E-page 188
© 2009 Microchip Technology Inc.
TABLE 17-7:
REGISTERS ASSOCIATED WITH I
2
C OPERATION
REGISTER 17-5:
SSPMSK: SSP MASK REGISTER
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-1
MSK<7:1>: Mask bits
1
= The received address bit n is compared to SSPADD<n> to detect I
2
C address match
0
= The received address bit n is not used to detect I
2
C address match
bit 0
MSK<0>: Mask bit for I
2
C Slave Mode, 10-bit Address
I
2
C Slave Mode, 10-bit Address (SSPM<3:0> = 0111):
1
= The received address bit ‘0’ is compared to SSPADD<0> to detect I
2
C address match
0
= The received address bit ‘0’ is not used to detect I
2
C address match
All other SSP modes: this bit has no effect.
REGISTER 17-6:
SSPADD: SSP I
2
C ADDRESS REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
ADD7
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
ADD<7:0>: Address bits
Received address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
PIR1
TMR1GIF
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
0000 0000
0000 0000
PIE1
TMR1GIE
ADIE
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
0000 0000
0000 0000
SSPBUF
Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx
uuuu uuuu
SSPADD
Synchronous Serial Port (I
2
C mode) Address Register
0000 0000
0000 0000
SSPCON
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
0000 0000
0000 0000
SSPMSK
(2)
Synchronous Serial Port (I
2
C mode) Address Mask Register
1111 1111
1111 1111
SSPSTAT
SMP
(1)
CKE
(1)
D/A
P
S
R/W
UA
BF
0000 0000
0000 0000
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
1111 1111
1111 1111
Legend:
x
= unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by SSP module in I
2
C
mode.
Note
1:
Maintain these bits clear in I
2
C mode.
2:
Accessible only when SSPM<3:0> = 1001.