Microchip Technology AC164112 Data Sheet
PIC16F72X/PIC16LF72X
DS41341E-page 236
© 2009 Microchip Technology Inc.
TABLE 23-11: SPI MODE REQUIREMENTS
FIGURE 23-20:
I
2
C™ BUS START/STOP BITS TIMING
Param
No.
Symbol
Characteristic
Min.
Typ†
Max. Units Conditions
SP70* T
SS
L2
SC
H,
T
SS
L2
SC
L
SS
↓ to SCK↓ or SCK↑ input
T
CY
—
—
ns
SP71* T
SC
H
SCK input high time (Slave mode)
T
CY
+ 20
—
—
ns
SP72* T
SC
L
SCK input low time (Slave mode)
T
CY
+ 20
—
—
ns
SP73* T
DI
V2
SC
H,
T
DI
V2
SC
L
Setup time of SDI data input to SCK edge
100
—
—
ns
SP74* T
SC
H2
DI
L,
T
SC
L2
DI
L
Hold time of SDI data input to SCK edge
100
—
—
ns
SP75* T
DO
R
SDO data output rise time
3.0-5.5V
—
10
25
ns
1.8-5.5V
—
25
50
ns
SP76* T
DO
F
SDO data output fall time
—
10
25
ns
SP77* T
SS
H2
DO
Z
SS
↑ to SDO output high-impedance
10
—
50
ns
SP78* T
SC
R
SCK output rise time
(Master mode)
(Master mode)
3.0-5.5V
—
10
25
ns
1.8-5.5V
—
25
50
ns
SP79* T
SC
F
SCK output fall time (Master mode)
—
10
25
ns
SP80* T
SC
H2
DO
V,
T
SC
L2
DO
V
SDO data output valid after
SCK edge
SCK edge
3.0-5.5V
—
—
50
ns
1.8-5.5V
—
—
145
ns
SP81* T
DO
V2
SC
H,
T
DO
V2
SC
L
SDO data output setup to SCK edge
Tcy
—
—
ns
SP82* T
SS
L2
DO
V
SDO data output valid after SS
↓ edge
—
—
50
ns
SP83* T
SC
H2
SS
H,
T
SC
L2
SS
H
SS
↑ after SCK edge
1.5T
CY
+ 40
—
—
ns
*
These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note: Refer to Figure 23-2 for load conditions.
SP91
SP92
SP93
SCL
SDA
Start
Condition
Stop
Condition
SP90