Microchip Technology AC164112 Data Sheet

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© 2009 Microchip Technology Inc.
DS41341E-page 37
PIC16F72X/PIC16LF72X
3.5
Brown-Out Reset (BOR)
Brown-out Reset is enabled by programming the
BOREN<1:0> bits in the Configuration register. The
brown-out trip point is selectable from two trip points
via the BORV bit in the Configuration register.
Between the POR and BOR, complete voltage range
coverage for execution protection can be imple-
mented.
Two bits are used to enable the BOR. When
BOREN = 11, the BOR is always enabled. When
BOREN = 10, the BOR is enabled, but disabled during
Sleep. When BOREN = 0X, the BOR is disabled.
If V
DD
 falls below V
BOR
 for greater than parameter
(T
BOR
tions”), the Brown-out situation will reset the device.
This will occur regardless of V
DD
 slew rate. A Reset is
not ensured to occur if V
DD
 falls below V
BOR
 for more
than parameter (T
BOR
). 
If V
DD
 drops below V
BOR
 while the Power-up Timer is
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once V
DD
rises above V
BOR
, the Power-up Timer will execute a
64 ms Reset.
FIGURE 3-3:
 BROWN-OUT SITUATIONS 
Note:
When erasing Flash program memory, the
BOR is forced to enabled at the minimum
BOR setting to guarantee that any code
protection circuitry is operating properly.
64 ms
(1)
V
BOR
 
V
DD
Internal
Reset
V
BOR
 
V
DD
Internal
Reset
64 ms
(1)
< 64 ms
64 ms
(1)
V
BOR
 
V
DD
Internal
Reset
Note 1:
64 ms delay only if PWRTE bit is programmed to ‘0’.