Microchip Technology 25LC160A-I/MS Memory IC MSOP-8 25LC160A-I/MS Data Sheet
Product codes
25LC160A-I/MS
© 2007 Microchip Technology Inc.
DS21807D-page 1
25AA160A/B, 25LC160A/B
Device Selection Table
Features:
• Max. Clock 10 MHz
• Low-Power CMOS Technology
• 2048 x 8-bit Organization
• 16-Byte Page (‘A’ version devices)
• 32-Byte Page (‘B’ version devices)
• Write Cycle Time: 5 ms max.
• Self-Timed Erase and Write Cycles
• Block Write Protection:
• Low-Power CMOS Technology
• 2048 x 8-bit Organization
• 16-Byte Page (‘A’ version devices)
• 32-Byte Page (‘B’ version devices)
• Write Cycle Time: 5 ms max.
• Self-Timed Erase and Write Cycles
• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
• Built-In Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
- Write enable latch
- Write-protect pin
• Sequential Read
• High Reliability:
• High Reliability:
- Endurance: 1,000,000 erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
- Data retention: > 200 years
- ESD protection: > 4000V
• Temperature Ranges Supported:
• Pb-Free and RoHS Compliant
Pin Function Table
Description:
The Microchip Technology Inc. 25AA160A/B,
25LC160A/B (25XX160A/B
25LC160A/B (25XX160A/B
*
) are 16 Kbit Serial
Electrically Erasable PROMs. The memory is accessed
via a simple Serial Peripheral Interface (SPI)
compatible serial bus. The bus signals required are a
clock input (SCK) plus separate data in (SI) and data
out (SO) lines. Access to the device is controlled
through a Chip Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25XX160A/B is available in standard Pb-free pack-
ages including 8-lead PDIP and SOIC, and advanced
packaging including 8-lead MSOP, and 8-lead TSSOP.
via a simple Serial Peripheral Interface (SPI)
compatible serial bus. The bus signals required are a
clock input (SCK) plus separate data in (SI) and data
out (SO) lines. Access to the device is controlled
through a Chip Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25XX160A/B is available in standard Pb-free pack-
ages including 8-lead PDIP and SOIC, and advanced
packaging including 8-lead MSOP, and 8-lead TSSOP.
Package Types (not to scale)
Part Number
V
CC
Range
Page Size
Temp. Ranges
Packages
25LC160A
2.5-5.5V
16 Byte
I,E
P, SN, ST, MS
25AA160A
1.8-5.5V
16 Byte
I
P, SN, ST, MS
25LC160B
2.5-5.5V
32 Byte
I,E
P, SN, ST, MS
25AA160B
1.8-5.5V
32 Byte
I
P, SN, ST, MS
- Industrial (I):
-40
°C to +85°C
- Automotive (E):
-40°C to +125°C
Name
Function
CS
Chip Select Input
SO
Serial Data Output
WP
Write-Protect
V
SS
Ground
SI
Serial Data Input
SCK
Serial Clock Input
HOLD
Hold Input
V
CC
Supply Voltage
CS
SO
WP
V
SS
1
2
3
4
2
3
4
8
7
6
5
7
6
5
V
CC
HOLD
SCK
SI
SCK
SI
PDIP/SOIC
(P, SN)
TSSOP/MSOP
CS
SO
WP
V
SS
1
2
3
4
8
7
6
5
V
CC
HOLD
SCK
SI
(ST, MS)
16K SPI Bus Serial EEPROM
*25XX160A/B is used in this document as a generic part
number for the 25AA160A/B, 25LC160A/B devices.
number for the 25AA160A/B, 25LC160A/B devices.