Microchip Technology DM183021 Data Sheet
PIC18F2331/2431/4331/4431
DS39616D-page 206
2010 Microchip Technology Inc.
REGISTER 19-1:
SSPSTAT: SYNCHRONOUS SERIAL PORT STATUS REGISTER
R/W-0
R/W-0
R-0
R-0
R-0
R-0
R-0
R-0
SMP
CKE
D/A
P
S
R/W
UA
BF
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
SMP:
Sample bit
SPI Master mode:
1
1
= Input data sampled at end of data output time
0
= Input data sampled at middle of data output time
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode.
SMP must be cleared when SPI is used in Slave mode.
bit 6
CKE
: SPI Clock Edge Select bit (
and
SPI mode, CKP = 0:
1
1
= Data transmitted on rising edge of SCK
0
= Data transmitted on falling edge of SCK
SPI mode, CKP = 1:
1
1
= Data transmitted on falling edge of SCK
0
= Data transmitted on rising edge of SCK
I
2
C™ mode:
This bit must be maintained clear.
bit 5
D/A
: Data/Address bit (I
2
C mode only)
1
= Indicates that the last byte received or transmitted was data
0
= Indicates that the last byte received or transmitted was address
bit 4
P
: Stop bit (I
2
C mode only)
This bit is cleared when the SSP module is disabled or when the Start bit is detected last; SSPEN is
cleared.
1
cleared.
1
= Indicates that a Stop bit has been detected last (this bit is ‘0’ on Reset)
0
= Stop bit was not detected last
bit 3
S
: Start bit (I
2
C mode only)
This bit is cleared when the SSP module is disabled or when the Stop bit is detected last; SSPEN is
cleared.
1
cleared.
1
= Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)
0
= Start bit was not detected last
bit 2
R/W
: Read/Write Information bit (I
2
C mode only)
This bit holds the R/W bit information following the last address match. This bit is only valid from the
address match to the next Start bit, Stop bit or ACK bit.
1
address match to the next Start bit, Stop bit or ACK bit.
1
= Read
0
= Write
bit 1
UA
: Update Address bit (10-Bit I
2
C mode only)
1
= Indicates that the user needs to update the address in the SSPADD register
0
= Address does not need to be updated
bit 0
BF
: Buffer Full Status bit
Receive (SPI and I
2
C modes):
1
= Receive complete, SSPBUF is full
0
= Receive not complete, SSPBUF is empty
Transmit (I
2
C mode only):
1
= Transmit in progress, SSPBUF is full
0
= Transmit complete, SSPBUF is empty