Microchip Technology DM183021 Data Sheet
2010 Microchip Technology Inc.
DS39616D-page 227
PIC18F2331/2431/4331/4431
FIGURE 20-2:
EUSART TRANSMIT BLOCK DIAGRAM
FIGURE 20-3:
ASYNCHRONOUS TRANSMISSION
FIGURE 20-4:
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
TXIF
TXIE
Interrupt
TXEN
Baud Rate CLK
SPBRG
Baud Rate Generator
TX9D
MSb
LSb
Data Bus
TXREG Register
TSR Register
(8)
0
TX9
TRMT
SPEN
RC6/TX/CK/SS Pin
Pin Buffer
and Control
8
SPBRGH
BRG16
Word 1
Word 1
Transmit Shift Reg
Start bit
bit 0
bit 1
bit 7/8
Write to TXREG
BRG Output
(Shift Clock)
RC6/TX/CK/SS
TXIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
1 T
CY
(pin)
Word 1
Stop bit
Transmit Shift Reg.
Write to TXREG
BRG Output
(Shift Clock)
RC6/TX/CK/SS
TXIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
Word 1
Word 2
Stop bit
Start bit
Transmit Shift Reg.
Word 1
Word 2
bit 0
bit 1
bit 7/8
bit 0
Note:
This timing diagram shows two consecutive transmissions.
1 T
CY
1 T
CY
(pin)
Start bit