Microchip Technology ARD00385 Data Sheet

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 2009-2011 Microchip Technology Inc.
DS39957D-page 145
PIC18F87K90 FAMILY
10.4
IPR Registers
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are six Peripheral
Interrupt Priority registers (IPR1 through IPR6). Using
the priority bits requires that the Interrupt Priority
Enable (IPEN) bit (RCON<7>) be set. 
     
  
REGISTER 10-16: IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
ADIP
RC1IP
TX1IP
SSP1IP
TMR1GIP
TMR2IP
TMR1IP
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: 
Read as ‘0’
bit 6
ADIP:
 A/D Converter Interrupt Priority bit
1
  = High  priority 
0
 = Low priority 
bit 5
RC1IP:
 EUSART Receive Interrupt Priority bit 
1
  = High  priority 
0
 = Low priority 
bit 4
TX1IP:
 EUSART Transmit Interrupt Priority bit 
1
  = High  priority 
0
 = Low priority
bit 3
SSP1IP:
 Master Synchronous Serial Port Interrupt Priority bit 
1
  = High  priority 
0
 = Low priority
bit 2
TMR1GIP:
 Timer1 Gate Interrupt Priority bit 
1
  = High  priority 
0
 = Low priority
bit 1
TMR2IP:
 TMR2 to PR2 Match Interrupt Priority bit 
1
  = High  priority 
0
 = Low priority
bit 0
TMR1IP:
 TMR1 Overflow Interrupt Priority bit 
1
  = High  priority 
0
 = Low priority