Microchip Technology ARD00385 Data Sheet

Page of 570
 2009-2011 Microchip Technology Inc.
DS39957D-page 331
PIC18F87K90 FAMILY
FIGURE 21-16:
I
2
C™ SLAVE MODE TIMING WITH SEN = 1 (RECEPTION, 10-BIT ADDRESS)
 
SD
A
x
SC
L
x
S
S
P
xIF
 (
P
IR1
<
3>
 o
r P
IR3<
7
>
BF
 (
S
SP
xS
TA
T
<
0
>
)
S
1
2
3
4
5
6
78
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
7
89
P
1
1
1
1
0
A
9
A
8
A
7
A
6
A
5
A
4A
3A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
1
D
0
Re
ce
ive
 Da
ta
 B
yte
AC
K
R/W
 = 
0
ACK
Receive F
irst B
yte o
f A
ddre
ss
C
lea
re
d i
n
 s
o
ftw
a
re
D2
6
 
Cl
ea
re
d in
 so
ftwa
re
R
e
cei
ve S
e
co
nd B
yte of 
A
d
dr
ess
C
le
ar
ed 
by har
dw
are
 w
h
en
SSP
xADD is u
pd
a
te
d
 wi
th
 lo
w
by
te of 
addr
ess af
ter
 falling ed
ge
U
A
 (
S
SPxS
TA
T
<1
>)
Clo
ck is h
e
ld
 lo
w u
ntil
up
date o
f S
S
P
xA
D
D
 has 
ta
ken
 pl
ace
U
A
 is
 set 
in
di
cati
ng 
that
th
e S
S
P
xA
D
D
 needs
 to be
update
d
UA
 is se
t indicatin
g
 that
S
S
P
xA
D
D
 n
eeds to
 be
upda
ted
Cle
a
re
d
 b
y h
a
rd
wa
re
 wh
en
S
S
P
xA
D
D
 is
 upda
ted w
ith h
igh
byte
 of ad
dress a
fte
r fa
lli
ng edge
SS
PxBUF
 is wr
itte
n
 with
con
tent
s of S
S
P
xS
R
Du
m
m
y r
e
a
d o
f SS
Px
BUF
to clear
 B
F
 flag
AC
K
C
KP (
SSP
xC
O
N
<4
>)
12
3
4
5
7
8
9
D7
D6
D5
D4
D3
D1
D0
Re
ce
ive
 Da
ta
 Byte
B
u
s m
a
ster
te
rmi
na
tes
tr
ansfe
r
D2
6
AC
K
Cle
ar
e
d
 in
 so
ftwa
re
C
lea
re
d i
n
 s
o
ftw
a
re
S
SPO
V
 (
S
SPx
CO
N1
<6
>)
CK
P
 written
 to 
‘1
No
te
:
An
 u
p
da
te
 o
f t
h
e
 SS
Px
ADD r
e
g
is
te
r b
e
fo
re
th
e fa
llin
g
 e
d
ge
 o
f th
e
 n
in
th
 clo
ck will
 h
a
ve
 n
o
ef
fe
ct on U
A
 an
d U
A
 w
ill
 r
e
ma
in
 set. 
No
te
:
An
 u
p
d
at
e
 o
f t
h
e SS
Px
ADD
re
g
is
ter
 be
fo
re
 t
h
e f
al
lin
g
ed
g
e
 o
f th
e n
in
th
 clo
ck will
ha
ve n
o
 ef
fect
 on U
A
 and
UA will r
em
a
in
 se
t. 
in
 so
ftwa
re
Clo
ck is h
e
ld
 lo
w u
n
til
upda
te of S
S
P
xA
D
D
 has 
ta
ke
n
 pl
ac
e
of n
inth cl
ock
of
 ni
nth
 cl
ock
SS
PO
V is
 s
e
t
be
cause S
S
P
xB
U
F
 is
still fu
ll. ACK
 is not se
nt.
Du
m
m
y r
e
a
d
 o
f SS
Px
BU
F
to
 clear 
B
F
 flag
Clo
ck is h
eld
 lo
w u
n
til
CK
P
 is se
t to 
‘1
Clo
ck is n
o
t h
e
ld
 lo
w
be
ca
u
se A
C
K
 = 
1