Microchip Technology ARD00385 Data Sheet
2009-2011 Microchip Technology Inc.
DS39957D-page 63
PIC18F87K90 FAMILY
REGISTER 4-3:
PMD1: PERIPHERAL MODULE DISABLE REGISTER 1
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
CTMUMD
RTCCMD
(
TMR4MD
TMR3MD
TMR2MD
TMR1MD
—
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented:
Read as ‘0’
bit 6
CTMUMD:
PMD CTMU Enable/Disable bit
1
= Peripheral Module Disable (PMD) is enabled for CMTU, disabling all of its clock sources
0
= PMD is disabled for CMTU
bit 5
RTCCMD:
PMD RTCC Enable/Disable bit
1
= PMD is enabled for RTCC, disabling all of its clock sources
0
= PMD is disabled for RTCC
bit 4
TMR4MD:
TMR4MD Disable bit
1
= PMD is enabled and all TMR4MD clock sources are disabled
0
= PMD is disabled and TMR4MD is enabled
bit 3
TMR3MD:
TMR3MD Disable bit
1
= PMD is enabled and all TMR3MD clock sources are disabled
0
= PMD is disabled and TMR3MD is enabled
bit 2
TMR2MD:
TMR2MD Disable bit
1
= PMD is enabled and all TMR2MD clock sources are disabled
0
= PMD is disabled and TMR2MD is enabled
bit 1
TMR1MD:
TMR1MD Disable bit
1
= PMD is enabled and all TMR1MD clock sources are disabled
0
= PMD is disabled and TMR1MD is enabled
bit 0
Unimplemented:
Read as ‘0’
Note 1:
for the unlock sequence (see