Microchip Technology MA330027 Data Sheet

Page of 622
 2009-2012 Microchip Technology Inc.
DS70616G-page 137
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
5.4
Flash Program Memory 
Resources
Many useful resources related to Flash program
memory are provided on the main product page of the
Microchip web site for the devices listed in this data
sheet. This product page, which can be accessed using
this 
, contains the latest updates and additional
information.
5.4.1
KEY RESOURCES
• Section 5. “Flash Programming” (DS70609) in 
the “dsPIC33E/PIC24E Family Reference 
Manual”
• Code Samples
• Application Notes
• Software Libraries
• Webinars
• All related “dsPIC33E/PIC24E Family Reference 
Manual” Sections
• Development Tools
5.5
Control Registers
Four SFRs are used to read and write the program
Flash memory: NVMCON, NVMKEY, NVMADRU and
NVMADR.
The NVMCON register (
) controls which
blocks are to be erased, which memory type is to be
programmed and the start of the programming cycle.
NVMKEY (
) is a write-only register that is
used for write protection. To start a programming or
erase sequence, the user application must
consecutively write 0x55 and 0xAA to the NVMKEY
register.
There are two NVM Address registers: NVMADRU and
NVMADR. These two registers, when concatenated,
form the 24-bit Effective Address (EA) of the selected
row or word for programming operations, or the
selected page for erase operations.
The NVMADRU register is used to hold the upper 8 bits
of the EA, while the NVMADR register is used to hold
the lower 16 bits of the EA.
Note:
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