Microchip Technology MA330027 Data Sheet
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 180
2009-2012 Microchip Technology Inc.
illustrates a block diagram of the auxiliary
PLL module.
FIGURE 9-3:
APLL BLOCK DIAGRAM
shows the relationship between the
auxiliary PLL input clock frequency (F
AIN
) and the
A
VCO
frequency (F
AVCO
).
EQUATION 9-4:
F
AVCO
CALCULATION
Note:
The auxiliary PLL module is only avail-
able on dsPIC33EPXXXMU8XX and
PIC24EPXXXGU8XX devices.
able on dsPIC33EPXXXMU8XX and
PIC24EPXXXGU8XX devices.
÷ N1
÷ M
PFD
VCO
APLLPRE<2:0>
APLLDIV<2:0>
3 MHz < F
AREF
< 5.5 MHz
60 MH
Z
< F
AVCO
< 120 MH
Z
F
AIN
F
AREF
F
AVCO
F
AVCO
F
AIN
M
N1
-------
=