Microchip Technology MA330027 Data Sheet

 2009-2012 Microchip Technology Inc.

DS70616G-page 273

R/W-0

U-0

R/W-0

U-0

U-0

U-0

U-0

U-0

TON

—

TSIDL

—

—

—

—

—

bit 15

bit 8

U-0

R/W-0

R/W-0

R/W-0

U-0

R/W-0

R/W-0

U-0

—

 TGATE

TCKPS<1:0>

—

TSYNC

TCS

—

bit 7

bit 0

Legend:
R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

TON: Timer1 On bit

1 = Starts 16-bit Timer1
0 = Stops 16-bit Timer1

bit 14

Unimplemented: Read as ‘0’

bit 13

TSIDL: Timer1 Stop in Idle Mode bit
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode

bit 12-7

Unimplemented: Read as ‘0’

bit 6

TGATE: Timer1 Gated Time Accumulation Enable bit
When TCS = 1: 
This bit is ignored.
When TCS = 0: 
1 = Gated time accumulation is enabled
0 = Gated time accumulation is disabled

bit 5-4

TCKPS<1:0> Timer1 Input Clock Prescale Select bits
11 = 1:256 
10 = 1:64
01 = 1:8 
00 = 1:1

bit 3

Unimplemented: Read as ‘0’

bit 2

TSYNC: Timer1 External Clock Input Synchronization Select bit

When TCS = 1: 
1 = Synchronizes external clock input
0 = Does not synchronize external clock input
When TCS = 0: 
This bit is ignored.

bit 1

TCS: Timer1 Clock Source Select bit

1 = External clock from T1CK pin (on the rising edge) 
0 = Internal clock (F

P

)

bit 0

Unimplemented: Read as ‘0’

Note 1: When Timer1 is enabled in External Synchronous Counter mode (TCS = 1, TSYNC = 1, TON = 1), any 

attempts by user software to write to the TMR1 register are ignored.