Microchip Technology MA330027 Data Sheet

 2009-2012 Microchip Technology Inc.

DS70616G-page 461

The programmable CRC generator offers the following
features:
• User-Programmable (up to 32nd order) 

Polynomial CRC Equation

• Interrupt Output
• Data FIFO
The programmable CRC generator provides a
hardware implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-Programmable CRC Polynomial Equation, 

up to 32 bits

• Programmable Shift Direction (little or big-endian)
• Independent Data and Polynomial Lengths
• Configurable Interrupt Output
• Data FIFO
A simplified block diagram of the CRC generator is
shown in 

. A simple version of the CRC shift

engine is shown in 

Note 1: This data sheet summarizes the features of

the dsPIC33EPXXX(GP/MC/MU)806/810/
814 and PIC24EPXXX(GP/GU)810/814
families of devices. It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to Section 27. “Programma-
ble Cyclic Redundancy Check (CRC)”
(DS70346) of the “dsPIC33E/PIC24E
Family Reference Manual”, which is
available from the Microchip web site
(

www.microchip.com

).

2: Some registers and associated bits

described in this section may not be available
on all devices. Refer to 

 in this data sheet for

device-specific register and bit information.

Variable FIFO

(4x32, 8x16 or 16x8)

Shift Buffer

CRC Shift Engine

LENDIAN

1

0

CRCISEL

1

0

FIFO Empty Event 

Shift Complete Event

Set CRCIF

2 * F

P

 Shift Clock

Bit 0

Bit 1

Bit n

X(1)

Read/Write Bus

Shift Buffer

Data

Bit 2

X(2)

X(n)

Note 1: Each XOR stage of the shift engine is programmable. See text for details.

2: Polynomial Length n is determined by ([PLEN<4:0>] + 1).