Microchip Technology DM164130-2 Data Sheet

Page of 478
 2010-2012 Microchip Technology Inc.
DS41414D-page 149
PIC16(L)F1946/47
12.16 Register Definitions: PORTG
REGISTER 12-24: PORTG: PORTG REGISTER
U-0
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
RG5
RG4
RG3
RG2
RG1
RG0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-6
Unimplemented: Read as ‘0’.
bit 5-0
RG<5:0>: PORTG General Purpose I/O Pin bits
1 = Port pin is > V
IH
0 = Port pin is < V
IL
REGISTER 12-25: TRISG: PORTG TRI-STATE REGISTER
U-0
U-0
R-1/1
R/W-1/1
R/W-1/1
R/W-1/1
R/W-1/1
R/W-1/1
TRISG5
TRISG4
TRISG3
TRISG2
TRISG1
TRISG0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-6
Unimplemented: Read as ‘0’.
bit 5
TRISG5: PORTG Tri-State Control bit
This bit (RG5 pin) is an input only and always read as ‘1’.
bit 4-0
TRISG<4:0>: PORTG Tri-State Control bits
1 = PORTG pin configured as an input (tri-stated)
0 = PORTG pin configured as an output
REGISTER 12-26: LATG: PORTG DATA LATCH REGISTER
U-0
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
LATG5
LATG4
LATG3
LATG2
LATG1
LATG0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-6
Unimplemented: Read as ‘0’.
bit 5-0
LATG<5:0>: PORTG Output Latch Value bits
Note 1:
Writes to PORTG are actually written to corresponding LATG register. Reads from PORTG register is return of actual 
I/O pin values.