Microchip Technology DM164130-2 Data Sheet
2010-2012 Microchip Technology Inc.
DS41414D-page 301
PIC16(L)F1946/47
FIGURE 25-4:
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK)
Transmit Shift Reg
Write to TXxREG
BRG Output
(Shift Clock)
TXx/CKx
TXxIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
Word 1
Word 2
Start bit
Stop bit
Start bit
Transmit Shift Reg
Word 1
Word 2
bit 0
bit 1
bit 7/8
bit 0
Note:
This timing diagram shows two consecutive transmissions.
1 T
CY
1 T
CY
pin
TABLE 25-1:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on page
BAUD1CON
ABDOVF
RCIDL
—
SCKP
BRG16
—
WUE
ABDEN
BAUD2CON
ABDOVF
RCIDL
—
SCKP
BRG16
—
WUE
ABDEN
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
PIE1
—
ADIE
RC1IE
TX1IE
SSP1IE
CCP1IE
TMR2IE
TMR1IE
PIE4
—
—
RC2IE
TX2IE
—
—
BCL2IE
SSP2IE
PIR1
—
ADIF
RC1IF
TX1IF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
PIR4
—
—
RC2IF
TX2IF
—
—
BCL2IF
SSP2IF
RC1STA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
RC2STA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
SP1BRGL
EUSART1 Baud Rate Generator, Low Byte
SP1BRGH
EUSART1 Baud Rate Generator, High Byte
SP2BRGL
EUSART2 Baud Rate Generator, Low Byte
SP2BRGH
EUSART2 Baud Rate Generator, High Byte
TX1REG
EUSART1 Transmit Register
TX1STA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
TX2REG
EUSART2 Transmit Register
TX2STA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
Legend:
— = unimplemented locations, read as ‘0’. Shaded bits are not used for asynchronous transmission.
*
Page provides register information.