Microchip Technology DM164130-2 Data Sheet

 2010-2012 Microchip Technology Inc.

DS41414D-page 375

Each instruction is a 14-bit word containing the opera-
tion code (opcode) and all required operands. The
opcodes are broken into three broad categories.
• Byte Oriented
• Bit Oriented
• Literal and Control
The literal and control category contains the most var-
ied instruction word format.
<Link>Table 29-3 lists the instructions recognized by
the MPASM

TM

 assembler.

All instructions are executed within a single instruction
cycle, with the following exceptions, which may take
two or three cycles: 
• Subroutine takes two cycles (CALL, CALLW)
• Returns from interrupts or subroutines take two 

cycles (RETURN, RETLW, RETFIE)

• Program branching takes two cycles (GOTO, BRA, 

BRW, BTFSS, BTFSC, DECFSZ, INCSFZ)

• One additional instruction cycle will be used when 

any instruction references an indirect file register 
and the file select register is pointing to program 
memory.

One instruction cycle consists of 4 oscillator cycles; for
an oscillator frequency of 4 MHz, this gives a nominal
instruction execution rate of 1 MHz.
All instruction examples use the format ‘0xhh’ to
represent a hexadecimal number, where ‘h’ signifies a
hexadecimal digit.

Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified,
and the result is stored according to either the instruc-
tion, or the destination designator ‘d’. A read operation
is performed on a register even if the instruction writes
to that register.

f

Register file address (0x00 to 0x7F)

W

Working register (accumulator)

b

Bit address within an 8-bit file register

k

Literal field, constant data or label

x

Don’t care location (= 0 or 1). 
The assembler will generate code with x = 0. 
It is the recommended form of use for 
compatibility with all Microchip software tools.

d

Destination select; d = 0: store result in 

W

,

d = 1: store result in file register f. 
Default is d = 1.

n

FSR or INDF number. (0-1)

mm

Pre-post increment-decrement mode 
selection

PC

Program Counter

TO

Time-out bit

C

Carry bit

DC

Digit carry bit

Z

Zero bit

PD

Power-down bit