Microchip Technology DM164130-2 Data Sheet
2010-2012 Microchip Technology Inc.
DS41414D-page 75
PIC16(L)F1946/47
5.6
Register Definitions: Oscillator Control
REGISTER 5-1:
OSCCON: OSCILLATOR CONTROL REGISTER
R/W-0/0
R/W-0/0
R/W-1/1
R/W-1/1
R/W-1/1
U-0
R/W-0/0
R/W-0/0
SPLLEN
IRCF<3:0>
—
SCS<1:0>
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
SPLLEN: Software PLL Enable bit
If PLLEN in Configuration Words = 1:
SPLLEN bit is ignored. 4x PLL is always enabled (subject to oscillator requirements)
If PLLEN in Configuration Words = 0:
1 = 4x PLL Is enabled
0 = 4x PLL is disabled
If PLLEN in Configuration Words = 1:
SPLLEN bit is ignored. 4x PLL is always enabled (subject to oscillator requirements)
If PLLEN in Configuration Words = 0:
1 = 4x PLL Is enabled
0 = 4x PLL is disabled
bit 6-3
)
1101 = 4 MHz HF
1100 = 2 MHz HF
1011 = 1 MHz HF
1010 = 500 kHz HF
1100 = 2 MHz HF
1011 = 1 MHz HF
1010 = 500 kHz HF
(1)
1001 = 250 kHz HF
(1)
1000 = 125 kHz HF
(1)
0111 = 500 kHz MF (default upon Reset)
0110 = 250 kHz MF
0101 = 125 kHz MF
0100 = 62.5 kHz MF
0011 = 31.25 kHz HF
0110 = 250 kHz MF
0101 = 125 kHz MF
0100 = 62.5 kHz MF
0011 = 31.25 kHz HF
(1)
0010 = 31.25 kHz MF
000x = 31 kHz LF
000x = 31 kHz LF
bit 2
Unimplemented: Read as ‘0’
bit 1-0
SCS<1:0>: System Clock Select bits
1x = Internal oscillator block
01 = Timer1 oscillator
00 = Clock determined by FOSC<2:0> in Configuration Words
1x = Internal oscillator block
01 = Timer1 oscillator
00 = Clock determined by FOSC<2:0> in Configuration Words
Note 1:
Duplicate frequency derived from HFINTOSC.