Microchip Technology MA300015 Data Sheet
© 2011 Microchip Technology Inc.
DS70150E-page 165
dsPIC30F6010A/6015
22.0
INSTRUCTION SET SUMMARY
The dsPIC30F instruction set adds many enhance-
ments to the previous PIC
ments to the previous PIC
®
Microcontroller (MCU)
instruction sets, while maintaining an easy migration
from PIC MCU instruction sets.
from PIC MCU instruction sets.
Most instructions are a single program memory word
(24-bits). Only three instructions require two program
memory locations.
(24-bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word divided
into an 8-bit opcode which specifies the instruction
type, and one or more operands which further specify
the operation of the instruction.
into an 8-bit opcode which specifies the instruction
type, and one or more operands which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
into five basic categories:
• Word or byte-oriented operations
• Bit-oriented operations
• Literal operations
• DSP operations
• Control operations
shows the general symbols used in
describing the instructions.
The dsPIC30F instruction set summary in
lists all the instructions along with the Status flags
affected by each instruction.
affected by each instruction.
Most word or byte-oriented W register instructions
(including barrel shift instructions) have three
operands:
(including barrel shift instructions) have three
operands:
• The first source operand, which is typically a
register ‘Wb’ without any address modifier
• The second source operand, which is typically a
register ‘Ws’ with or without an address modifier
• The destination of the result, which is typically a
register ‘Wd’ with or without an address modifier
However, word or byte-oriented file register instructions
have two operands:
have two operands:
• The file register specified by the value ‘f’
• The destination, which could either be the file
register ‘f’ or the W0 register, which is denoted as
‘WREG’
‘WREG’
Most bit oriented instructions (including simple rotate/
shift instructions) have two operands:
shift instructions) have two operands:
• The W register (with or without an address modi-
fier) or file register (specified by the value of ‘Ws’
or ‘f’)
or ‘f’)
• The bit in the W register or file register
(specified by a literal value, or indirectly by the
contents of register ‘Wb’)
contents of register ‘Wb’)
The literal instructions that involve data movement may
use some of the following operands:
use some of the following operands:
• A literal value to be loaded into a W register or file
register (specified by the value of ‘k’)
• The W register or file register where the literal
value is to be loaded (specified by ‘Wb’ or ‘f’)
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
logical operations use some of the following operands:
• The first source operand, which is a register ‘Wb’
without any address modifier
• The second source operand, which is a literal
value
• The destination of the result (only if not the same
as the first source operand), which is typically a
register ‘Wd’ with or without an address modifier
register ‘Wd’ with or without an address modifier
The MAC class of DSP instructions may use some of the
following operands:
following operands:
• The accumulator (A or B) to be used (required
operand)
• The W registers to be used as the two operands
• The X and Y address space prefetch operations
• The X and Y address space prefetch destinations
• The accumulator write-back destination
The other DSP instructions do not involve any
multiplication, and may include:
multiplication, and may include:
• The accumulator to be used (required)
• The source or destination operand (designated as
Wso or Wdo, respectively) with or without an
address modifier
address modifier
• The amount of shift, specified by a W register ‘Wn’
or a literal value
The control instructions may use some of the following
operands:
operands:
• A program memory address
• The mode of the table read and table write
instructions
All instructions are a single word, except for certain
double word instructions, which were made double
word instructions so that all the required information is
available in these 48 bits. In the second word, the
8 MSbs are ‘0’s. If this second word is executed as an
instruction (by itself), it will execute as a NOP.
double word instructions, which were made double
word instructions so that all the required information is
available in these 48 bits. In the second word, the
8 MSbs are ‘0’s. If this second word is executed as an
instruction (by itself), it will execute as a NOP.
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC
Programmer’s Reference Manual”
(DS70157).
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC
Programmer’s Reference Manual”
(DS70157).