Microchip Technology MA300015 Data Sheet

Page of 236
© 2011 Microchip Technology Inc.
DS70150E-page 187
dsPIC30F6010A/6015
 
TABLE 24-14: EXTERNAL CLOCK TIMING REQUIREMENTS 
AC CHARACTERISTICS
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
-40°C 
≤ T
A
 
≤ +85°C for Industrial 
-40°C 
≤ T
A
 
≤ +125°C for Extended 
Param
No.
Symb
ol
Characteristic
Min
Typ
(1)
Max
Units
Conditions
OS10
F
OSC
External CLKN Frequency
(2)
(External clocks allowed only
in EC mode)
DC
4
4
4



40
10
10
7.5
(3)
MHz
MHz
MHz
MHz
EC
EC with 4x PLL
EC with 8x PLL
EC with 16x PLL
Oscillator Frequency
(2)
DC
0.4
4
4
4
4
10
10
10
10
12
(4)
12
(4)
12
(4)












32.768
4
4
10
10
10
7.5
(3)
25
20
(4)
20
(4)
15
(3)
25
25
22.5
(3)
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
kHz
RC
XTL
XT
XT with 4x PLL
XT with 8x PLL
XT with 16x PLL
HS
HS/2 with 4x PLL
HS/2 with 8x PLL
HS/2 with 16x PLL
HS/3 with 4x PLL
HS/3 with 8x PLL
HS/3 with 16x PLL
LP
OS20
T
OSC
T
OSC
 = 1/F
OSC
See parameter OS10
for F
OSC
 value
OS25
T
CY
Instruction Cycle Time
(2)(5)
33
DC
ns
See 
OS30
TosL,
TosH
External Clock
(2)
 in (OSC1)
High or Low Time
.45 x T
OSC
ns
EC
OS31
TosR,
TosF
External Clock
(2)
 in (OSC1)
Rise or Fall Time
20
ns
EC
OS40
TckR
CLKO Rise Time
(2)(6)
 
ns
See parameter 
OS41
TckF
CLKO Fall Time
(2)(6)
ns
See parameter DO32
Note 1:
Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and 
are not tested.
2:
These parameters are characterized but not tested in manufacturing.
3:
Limited by the PLL output frequency range.
4:
Limited by the PLL input frequency range.
5:
Instruction cycle period (T
CY
) equals four times the input oscillator time base period. All specified values 
are based on characterization data for that particular oscillator type under standard operating conditions 
with the device executing code. Exceeding these specified limits may result in an unstable oscillator 
operation and/or higher than expected current consumption. All devices are tested to operate at “min.” 
values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the 
“Max.” cycle time limit is “DC” (no clock) for all devices.
6:
Measurements are taken in EC or ERC modes. The CLKO signal is measured on the OSC2 pin. CLKO is 
low for the Q1-Q2 period (1/2 T
CY
) and high for the Q3-Q4 period (1/2 T
CY
).