Microchip Technology AC244045 Data Sheet

DS41341E-page 136

© 2009 Microchip Technology Inc.

  

U-0

U-0

R/W-0

R/W-0 R/W-0 R/W-0  R/W-0 R/W-0

—

—

DCxB1

DCxB0

CCPxM3

CCPxM2

CCPxM1

CCPxM0

bit 7

bit 0

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

Unimplemented: Read as ‘0’

bit 5-4

DCxB<1:0>: PWM Duty Cycle Least Significant bits
Capture mode: 
Unused
Compare mode: 
Unused
PWM mode: 
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.

bit 3-0

CCPxM<3:0>: CCP Mode Select bits
0000

 = Capture/Compare/PWM off (resets CCP module)

0001

 = Unused (reserved)

0010

 = Compare mode, toggle output on match (CCPxIF bit of the PIRx register is set)

0011

 = Unused (reserved)

0100

 = Capture mode, every falling edge

0101

 = Capture mode, every rising edge

0110

 = Capture mode, every 4th rising edge

0111

 = Capture mode, every 16th rising edge

1000

 = Compare mode, set output on match (CCPxIF bit of the PIRx register is set)

1001

 = Compare mode, clear output on match (CCPxIF bit of the PIRx register is set)

1010

 = Compare mode, generate software interrupt on match (CCPxIF bit is set of the PIRx register,

CCPx pin is unaffected)

1011

 = Compare mode, trigger special event (CCPxIF bit of the PIRx register is set, TMR1 is reset

and A/D conversion

 is started if the ADC module is enabled. CCPx pin is unaffected.)

11xx

 = PWM mode.

Note 1: A/D conversion start feature is available only on CCP2.