Microchip Technology AC244045 Data Sheet
PIC16F72X/PIC16LF72X
DS41341E-page 156
© 2009 Microchip Technology Inc.
16.2
AUSART Baud Rate Generator
(BRG)
(BRG)
The Baud Rate Generator (BRG) is an 8-bit timer that
is dedicated to the support of both the asynchronous
and synchronous AUSART operation.
is dedicated to the support of both the asynchronous
and synchronous AUSART operation.
The SPBRG register determines the period of the free
running baud rate timer. In Asynchronous mode the
multiplier of the baud rate period is determined by the
BRGH bit of the TXSTA register. In Synchronous mode,
the BRGH bit is ignored.
running baud rate timer. In Asynchronous mode the
multiplier of the baud rate period is determined by the
BRGH bit of the TXSTA register. In Synchronous mode,
the BRGH bit is ignored.
Table 16-3 contains the formulas for determining the
baud rate. Example 16-1 provides a sample calculation
for determining the baud rate and baud rate error.
baud rate. Example 16-1 provides a sample calculation
for determining the baud rate and baud rate error.
Typical baud rates and error values for various
asynchronous modes have been computed for your
convenience and are shown in Table 16-3. It may be
advantageous to use the high baud rate (BRGH = 1), to
reduce the baud rate error.
asynchronous modes have been computed for your
convenience and are shown in Table 16-3. It may be
advantageous to use the high baud rate (BRGH = 1), to
reduce the baud rate error.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures that
the BRG does not wait for a timer overflow before
outputting the new baud rate.
BRG timer to be reset (or cleared). This ensures that
the BRG does not wait for a timer overflow before
outputting the new baud rate.
EXAMPLE 16-1:
CALCULATING BAUD
RATE ERROR
RATE ERROR
TABLE 16-3:
BAUD RATE FORMULAS
TABLE 16-4:
REGISTERS ASSOCIATED WITH THE BAUD RATE GENERATOR
For a device with F
OSC
of 16 MHz, desired baud rate of
9600, and Asynchronous mode with SYNC = 0 and BRGH
= 0 (as seen in Table 16-3):
= 0 (as seen in Table 16-3):
Solving for SPBRG:
SPBRG
F
OSC
64 Desired Baud Rate
(
)
---------------------------------------------------------
⎝
⎠
⎛
⎞
1
–
=
Desired Baud Rate
F
OSC
64 SPBRG
1
+
(
)
---------------------------------------
=
16000000
64
9600
(
)
------------------------
⎝
⎠
⎛
⎞
1
–
=
25.042
[
]
25
=
=
Actual Baud Rate
16000000
64 25
1
+
(
)
---------------------------
=
9615
=
Error
Actual Baud Rate Desired Baud Rate
–
Desired Baud Rate
--------------------------------------------------------------------------------------------------
⎝
⎠
⎛
⎞
100
=
9615 9600
–
9600
------------------------------
⎝
⎠
⎛
⎞
100
0.16%
=
=
%
Configuration Bits
AUSART Mode
Baud Rate Formula
SYNC
BRGH
0
0
Asynchronous
F
OSC
/[64 (n+1)]
0
1
Asynchronous
F
OSC
/[16 (n+1)]
1
x
Synchronous
F
OSC
/[4 (n+1)]
Legend:
x
= Don’t care, n = value of SPBRG register
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
RCSTA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
0000 000x
0000 000x
SPBRG
BRG7
BRG6
BRG5
BRG4
BRG3
BRG2
BRG1
BRG0
0000 0000
0000 0000
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D
0000 -010
0000 -010
Legend:
x
= unknown, - = unimplemented read as ‘0’. Shaded cells are not used for the Baud Rate Generator.