Microchip Technology AC244045 Data Sheet
© 2009 Microchip Technology Inc.
DS41341E-page 33
PIC16F72X/PIC16LF72X
3.0
RESETS
The PIC16F72X/PIC16LF72X differentiates between
various kinds of Reset:
various kinds of Reset:
a)
Power-on Reset (POR)
b)
WDT Reset during normal operation
c)
WDT Reset during Sleep
d)
MCLR Reset during normal operation
e)
MCLR Reset during Sleep
f)
Brown-out Reset (BOR)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset (POR)
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
Most registers are not affected by a WDT wake-up
since this is viewed as the resumption of normal
operation. TO and PD bits are set or cleared differently
in different Reset situations, as indicated in Table 3-3.
These bits are used in software to determine the nature
of the Reset.
since this is viewed as the resumption of normal
operation. TO and PD bits are set or cleared differently
in different Reset situations, as indicated in Table 3-3.
These bits are used in software to determine the nature
of the Reset.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 3-1.
is shown in Figure 3-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 23.0 “Electrical
Specifications” for pulse width specifications.
ignore small pulses. See Section 23.0 “Electrical
Specifications” for pulse width specifications.
FIGURE 3-1:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
MCLR/V
PP
V
DD
OSC1/
WDT
Module
POR
OST/PWRT
WDTOSC
WDT
Time-out
Time-out
Power-on Reset
OST
10-bit Ripple Counter
PWRT
Chip_Reset
11-bit Ripple Counter
Reset
Enable OST
Enable PWRT
Sleep
Brown-out
(1)
Reset
BOREN
CLKIN
Note
1:
Refer to the Configuration Word Register 1 (Register 8-1).
MCLRE