Microchip Technology AC244045 Data Sheet
PIC16F72X/PIC16LF72X
DS41341E-page 36
© 2009 Microchip Technology Inc.
3.4.2
WDT CONTROL
The WDTE bit is located in the Configuration Word
Register 1. When set, the WDT runs continuously.
Register 1. When set, the WDT runs continuously.
The PSA and PS<2:0> bits of the OPTION register
control the WDT period. See Section 11.0 “Timer0
Module” for more information.
control the WDT period. See Section 11.0 “Timer0
Module” for more information.
FIGURE 3-1:
WATCHDOG TIMER BLOCK DIAGRAM
From TMR0
Postscaler
8
PS<2:0>
PSA
TO TMR0
1
1
0
0
Clock Source
To T1G
Divide by
512
WDTE
TMR1GE
T1GSS = 11
WDTE
WDT Reset
Low-Power
WDT OSC
WDT OSC
TABLE 3-1:
WDT STATUS
Conditions
WDT
WDTE = 0
Cleared
CLRWDT
Command
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
Cleared until the end of OST