Microchip Technology DM163025-1 Data Sheet

Page of 536
PIC18(L)F2X/45K50
DS30684A-page 118
 2012 Microchip Technology Inc.
FIGURE 10-1:
PIC18 INTERRUPT LOGIC   
Note:
Do not use the MOVFF instruction to
modify any of the interrupt control
registers while any interrupt is enabled.
Doing so may cause erratic
microcontroller behavior.
TMR0IE
GIEH/GIE
Wake-up if in 
Interrupt to CPU
Vector to Location
0008h
INT2IF
INT2IE
INT2IP
INT1IF
INT1IE
INT1IP
TMR0IF
TMR0IE
TMR0IP
IOCIF
IOCIE
IOCIP
TMR0IF
TMR0IP
INT1IF
INT1IE
INT1IP
INT2IF
INT2IE
INT2IP
IOCIF
IOCIE
IOCIP
INT0IF
INT0IE
GIEL/PEIE
Interrupt to CPU
Vector to Location
IPEN
IPEN
0018h
 
 
High Priority Interrupt Generation
Low Priority Interrupt Generation
Idle or Sleep modes
GIEH/GIE
Note
1:
The IOCIF interrupt also requires the individual pin IOCB enables.
(1)
(1)
PIR1<7:0>
PIE1<7:0>
IPR1<7:0>
PIR2<7:0>
PIE2<7:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
 
 
PIR1<7:0>
PIE1<7:0>
IPR1<7:0>
PIR2<7:0>
PIE2<7:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
IPEN
GIEL/PEIE