Microchip Technology DM163025-1 Data Sheet

Page of 536
 2012 Microchip Technology Inc.
DS30684A-page 19
PIC18(L)F2X/45K50
TABLE 1-3:
PIC18(L)F45K50 PINOUT I/O DESCRIPTIONS
Pin Number
Pin Name
Pin 
Type
Buffer 
Type
Description
PDIP
TQFP
UQFN
2
19
17
RA0/C12IN0-/AN0
RA0
I/O
TTL/DIG Digital I/O.
C12IN0-
I
Analog
Comparators C1 and C2 inverting input.
AN0
I
Analog
Analog input 0.
3
20
18
RA1/C12IN1-/AN1
RA1
I/O
TTL/DIG Digital I/O.
C12IN1-
I
Analog
Comparators C1 and C2 inverting input.
AN1
I
Analog
Analog input 1.
4
21
19
RA2/C2IN+/AN2/DACOUT/V
REF
-
RA2
I/O
TTL/DIG Digital I/O.
C2IN+
I
Analog
Comparator C2 non-inverting input.
AN2
I
Analog
Analog input 2.
DACOUT
O
Analog
DAC Reference output.
V
REF
-
I
Analog
A/D reference voltage (low) input.
5
22
20
RA3/C1IN+/AN3/V
REF
+
RA3
I/O
TTL/DIG Digital I/O.
C1IN+
I
Analog
Comparator C1 non-inverting input.
AN3
I
Analog
Analog input 3.
V
REF
+
I
Analog
A/D reference voltage (high) input.
6
23
21
RA4/C1OUT/SRQ/T0CKI
RA4
I/O
ST/DIG Digital I/O.
C1OUT
O
DIG
Comparator C1 output.
SRQ
O
TTL
SR latch Q output.
T0CKI
I
ST
Timer0 external clock input.
7
24
22
RA5/C2OUT/SRNQ/SS/HLVDIN/AN4
RA5
I/O
TTL/DIG Digital I/O.
C2OUT
O
DIG
Comparator C2 output.
SRNQ
O
DIG
SR latch Q output.
SS
I
TTL
SPI slave select input (MSSP).
HLVDIN
I
Analog
High/Low-Voltage Detect input.
AN4
I
Analog
Analog input 4.
14
31
29
RA6/CLKO/OSC2
RA6
I/O
TTL/DIG Digital I/O.
CLKO
O
DIG
Outputs 1/4 the frequency of OSC1 and denotes the 
instruction cycle rate.
OSC2
O
Oscillator crystal output. Connects to crystal or resonator in 
Crystal Oscillator mode.
13
30
28
RA7/CLKI/OSC1
RA7
I/O
TTL/DIG Digital I/O.
CLKI
I
CMOS
External clock source input. Always associated with pin 
function OSC1.
OSC1
I
ST
Oscillator crystal input or external clock source input ST buffer 
when configured in RC mode; CMOS otherwise.
Legend:
TTL = TTL compatible input; CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;   
I = Input; O = Output; P = Power.
Note
1:
Default pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are set.
2:
Alternate pin assignment for SDO, T3CKI and CCP2 when Configuration bits SDOMX, T3CMX and CCP2MX are clear.
3:
Pin is “No Connect”, except on PIC18(L)F45K50 TQFP devices with ICPRT Configuration bit set.