Microchip Technology DM163025-1 Data Sheet
PIC18(L)F2X/45K50
DS30684A-page 238
2012 Microchip Technology Inc.
16.5.4 SLAVE MODE 10-BIT ADDRESS
RECEPTION
This section describes a standard sequence of
events for the MSSP module configured as an I
events for the MSSP module configured as an I
2
C
slave in 10-bit Addressing mode.
and is used as a visual reference for this
description.
This is a step by step process of what must be done by
slave software to accomplish I
This is a step by step process of what must be done by
slave software to accomplish I
2
C communication.
1.
Bus starts Idle.
2.
Master sends Start condition; S bit of SSPxSTAT
is set; SSPIF is set if interrupt on Start detect is
enabled.
is set; SSPIF is set if interrupt on Start detect is
enabled.
3.
Master sends matching high address with R/W
bit clear; UA bit of the SSPxSTAT register is set.
bit clear; UA bit of the SSPxSTAT register is set.
4.
Slave sends ACK and SSPIF is set.
5.
Software clears the SSPIF bit.
6.
Software reads received address from SSPxBUF
clearing the BF flag.
clearing the BF flag.
7.
Slave loads low address into SSPxADD,
releasing SCL.
releasing SCL.
8.
Master sends matching low address byte to the
slave; UA bit is set.
slave; UA bit is set.
9.
Slave sends ACK and SSPIF is set.
10. Slave clears SSPIF.
11. Slave reads the received matching address
11. Slave reads the received matching address
from SSPxBUF clearing BF.
12. Slave loads high address into SSPxADD.
13. Master clocks a data byte to the slave and clocks
13. Master clocks a data byte to the slave and clocks
out the slaves ACK on the 9th SCL pulse; SSPIF
is set.
is set.
14. If SEN bit of SSPxCON2 is set, CKP is cleared
by hardware and the clock is stretched.
15. Slave clears SSPIF.
16. Slave reads the received byte from SSPxBUF
16. Slave reads the received byte from SSPxBUF
clearing BF.
17. If SEN is set the slave sets CKP to release the
SCL.
18. Steps 13-17 repeat for each received byte.
19. Master sends Stop to end the transmission.
19. Master sends Stop to end the transmission.
16.5.5 10-BIT ADDRESSING WITH ADDRESS
OR DATA HOLD
Reception using 10-bit addressing with AHEN or
DHEN set is the same as with 7-bit modes. The only
difference is the need to update the SSPxADD register
using the UA bit. All functionality, specifically when the
CKP bit is cleared and SCL line is held low are the
same.
DHEN set is the same as with 7-bit modes. The only
difference is the need to update the SSPxADD register
using the UA bit. All functionality, specifically when the
CKP bit is cleared and SCL line is held low are the
same.
can be used as a reference of a
slave in 10-bit addressing with AHEN set.
shows a standard waveform for a slave
transmitter in 10-bit Addressing mode.
Note:
Updates to the SSPxADD register are not
allowed until after the ACK sequence.
allowed until after the ACK sequence.
Note:
If the low address does not match, SSPIF
and UA are still set so that the slave soft-
ware can set SSPxADD back to the high
address. BF is not set because there is no
match. CKP is unaffected.
and UA are still set so that the slave soft-
ware can set SSPxADD back to the high
address. BF is not set because there is no
match. CKP is unaffected.