Microchip Technology DM163025-1 Data Sheet
2012 Microchip Technology Inc.
DS30684A-page 391
PIC18(L)F2X/45K50
REGISTER 26-5:
CONFIG3H: CONFIGURATION REGISTER 3 HIGH
R/P-1
R/P-1
U-0
R/P-1
U-0
U-0
R/P-1
R/P-1
MCLRE
SDOMX
—
T3CMX
—
—
PBADEN
CCP2MX
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed
x = Bit is unknown
bit 7
MCLRE:
MCLR Pin Enable bit
1
= MCLR pin enabled; RE3 input pin disabled
0
= RE3 input pin enabled; MCLR disabled
bit 6
SDOMX:
SDO Output MUX bit
1
= SDO is on RB3
0
= SDO is on RC7
bit 5
Unimplemented:
Read as ‘0’
bit 4
T3CMX:
Timer3 Clock Input MUX bit
1
= T3CKI is on RC0
0
= T3CKI is on RB5
bit 3-2
Unimplemented:
Read as ‘0’
bit 1
PBADEN:
PORTB A/D Enable bit
1
= ANSELB<5:0> resets to 1, PORTB<5:0> pins are configured as analog inputs on Reset
0
= ANSELB<5:0> resets to 0, PORTB<4:0> pins are configured as digital I/O on Reset
bit 0
CCP2MX:
CCP2 MUX bit
1
= CCP2 input/output is multiplexed with RC1
0
= CCP2 input/output is multiplexed with RB3