Microchip Technology DM330023-2 Data Sheet
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
DS70283K-page 124
© 2007-2012 Microchip Technology Inc.
10.9
Peripheral Pin Select Registers
The dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 family of devices implement 21
registers for remappable peripheral configuration:
• Input Remappable Peripheral Registers (13)
• Output Remappable Peripheral Registers (8)
dsPIC33FJ16MC304 family of devices implement 21
registers for remappable peripheral configuration:
• Input Remappable Peripheral Registers (13)
• Output Remappable Peripheral Registers (8)
Note:
Input and Output Register values can only
be changed if OSCCON[IOLOCK] = 0.
See
be changed if OSCCON[IOLOCK] = 0.
See
REGISTER 10-1:
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
U-0
U-0
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
—
—
—
INT1R<4:0>
bit 15
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
Unimplemented: Read as ‘0’
bit 12-8
INT1R<4:0>: Assign External Interrupt 1 (INTR1) to the corresponding RPn pin bits
11111 = Input tied V
11111 = Input tied V
SS
11001 = Input tied to RP25
.
.
.
00001 = Input tied to RP1
00000 = Input tied to RP0
.
.
.
00001 = Input tied to RP1
00000 = Input tied to RP0
bit 7-0
Unimplemented: Read as ‘0’