Microchip Technology TDGL002 - chipKIT Uno32 Development Board TDGL002 TDGL002 Data Sheet

Product codes
TDGL002
Page of 214
© 2011 Microchip Technology Inc.
DS61143H-page 133
PIC32MX3XX/4XX
REGISTER 26-2:
DEVCFG1: DEVICE CONFIGURATION WORD 1
Bit 
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
r-1
r-1
r-1
r-1
r-1
r-1
r-1
r-1
23:16
R/P
r-1
r-1
R/P
R/P
R/P
R/P
R/P
FWDTEN
WDTPS<4:0>
15:8
R/P
R/P
R/P
R/P
r-1
R/P
R/P
R/P
FCKSM<1:0>
FPBDIV<1:0>
OSCIOFNC
POSCMOD<1:0>
7:0
R/P
r-1
R/P
r-1
r-1
R/P
R/P
R/P
IESO
FSOSCEN
FNOSC<2:0>
Legend:
R = Readable bit
W = Writable bit
P = Programmable bit
r = Reserved bit
U = Unimplemented bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
bit 31-24 Reserved: Write ‘1’
bit 23
FWDTEN: Watchdog Timer Enable bit
1
 = The WDT is enabled and cannot be disabled by software
0
 = The WDT is not enabled; it can be enabled in software
bit 22-21 Reserved: Write ‘1’
bit 20-16 WDTPS<4:0>: Watchdog Timer Postscale Select bits
10100
 = 1:1048576
10011
 = 1:524288
10010
 = 1:262144
10001
 = 1:131072
10000
 = 1:65536
01111
 = 1:32768
01110
 = 1:16384
01101
 = 1:8192
01100
 = 1:4096
01011
 = 1:2048
01010
 = 1:1024
01001
 = 1:512
01000
 = 1:256
00111
 = 1:128
00110
 = 1:64
00101
 = 1:32
00100
 = 1:16
00011
 = 1:8
00010
 = 1:4
00001
 = 1:2
00000
 = 1:1
All other combinations not shown result in operation = ‘10100’
bit 15-14 FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
1x
 = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01
 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00
 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Note 1:
Do not disable P
OSC
 (POSCMOD = 00) when using this oscillator source.