Microchip Technology TDGL002 - chipKIT Uno32 Development Board TDGL002 TDGL002 Data Sheet
Product codes
TDGL002
PIC32MX3XX/4XX
DS61143H-page 138
© 2011 Microchip Technology Inc.
26.3
On-Chip Voltage Regulator
All PIC32MX3XX/4XX device’s core and digital logic
are designed to operate at a nominal 1.8V. To simplify
system designs, most devices in the
PIC32MX3XX/4XX incorporate an on-chip regulator
providing the required core logic voltage from V
are designed to operate at a nominal 1.8V. To simplify
system designs, most devices in the
PIC32MX3XX/4XX incorporate an on-chip regulator
providing the required core logic voltage from V
DD
.
The internal 1.8V regulator is controlled by the
ENVREG pin. Tying this pin to V
ENVREG pin. Tying this pin to V
DD
enables the regu-
lator, which in turn provides power to the core. A low
ESR capacitor (such as tantalum) must be connected
to the V
ESR capacitor (such as tantalum) must be connected
to the V
CORE
/V
CAP
pin (
). This helps to
maintain the stability of the regulator. The recom-
mended value for the filer capacitor is provided in
mended value for the filer capacitor is provided in
.
Tying the ENVREG pin to V
SS
disables the regulator. In
this case, separate power for the core logic at a nomi-
nal 1.8V must be supplied to the device on the
V
nal 1.8V must be supplied to the device on the
V
CORE
/V
CAP
pin.
Alternatively, the V
CORE
/V
CAP
and V
DD
pins can be tied
together to operate at a lower nominal voltage. Refer to
for possible configurations.
26.3.1
ON-CHIP REGULATOR AND POR
When the voltage regulator is enabled, it takes fixed
delay for it to generate output. During this time, desig-
nated as T
delay for it to generate output. During this time, desig-
nated as T
PU
, code execution is disabled. T
PU
is applied
every time the device resumes operation after any
power-down, including Sleep mode.
power-down, including Sleep mode.
If the regulator is disabled, a separate Power-up Timer
(PWRT) is automatically enabled. The PWRT adds a
fixed delay of T
(PWRT) is automatically enabled. The PWRT adds a
fixed delay of T
PWRT
at device start-up. See
information on T
PU
AND
T
PWRT
.
26.3.2
ON-CHIP REGULATOR AND BOR
When the on-chip regulator is enabled,
PIC32MX3XX/4XX devices also have a simple brown-
out capability. If the voltage supplied to the regulator is
inadequate to maintain a regulated level, the regulator
Reset circuitry will generate a Brown-out Reset. This
event is captured by the BOR flag bit (RCON<1>). The
brown-out voltage levels are specific in
PIC32MX3XX/4XX devices also have a simple brown-
out capability. If the voltage supplied to the regulator is
inadequate to maintain a regulated level, the regulator
Reset circuitry will generate a Brown-out Reset. This
event is captured by the BOR flag bit (RCON<1>). The
brown-out voltage levels are specific in
26.3.3
POWER-UP REQUIREMENTS
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
CORE
must never
exceed V
DD
by 0.3 volts.
FIGURE 26-2:
CONNECTIONS FOR THE ON-CHIP REGULATOR
Note:
It is important that the low ESR capacitor
is placed as close as possible to the
V
is placed as close as possible to the
V
CORE
/V
CAP
pin.
V
DD
ENVREG
V
CORE
/V
CAP
V
SS
PIC32MX
3.3V
(1)
1.8V
(1)
V
DD
ENVREG
V
CORE
/V
CAP
V
SS
PIC32MX
C
EFC
3.3V
Regulator Enabled (ENVREG tied to V
DD
):
Regulator Disabled (ENVREG tied to ground):
Note
1:
These are typical operating voltages. Refer to
DD
and V
CORE
.
(10
μF typ)