Microchip Technology TDGL002 - chipKIT Uno32 Development Board TDGL002 TDGL002 Data Sheet
Product codes
TDGL002
© 2011 Microchip Technology Inc.
DS61143H-page 171
PIC32MX3XX/4XX
FIGURE 29-10:
SPIx MODULE MASTER MODE (CKE = 0) TIMING CHARACTERISTICS
TABLE 29-28: SPIx MASTER MODE (CKE = 0) TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
≤ T
A
≤ +85°C for Industrial
-40°C
≤ T
A
≤ +105°C for V-Temp
Param.
No.
Symbol
Characteristics
(1)
Min.
Typical
(2)
Max.
Units
Conditions
SP10
T
SC
L
SCKx Output Low Time
(3)
T
SCK
/2
—
—
ns
—
SP11
T
SC
H
SCKx Output High Time
(3)
T
SCK
/2
—
—
ns
—
SP20
T
SC
F
SCKx Output Fall Time
(4)
—
—
—
ns
See parameter DO32
SP21
T
SC
R
SCKx Output Rise Time
(4)
—
—
—
ns
See parameter DO31
SP30
T
DO
F
SDOx Data Output Fall Time
(4)
—
—
—
ns
See parameter DO32
SP31
T
DO
R
SDOx Data Output Rise Time
(4)
—
—
—
ns
See parameter DO31
SP35
T
SC
H2
DO
V,
T
SC
L2
DO
V
SDOx Data Output Valid after
SCKx Edge
SCKx Edge
—
—
15
ns
V
DD
> 2.7V
—
—
20
ns
V
DD
< 2.7V
SP40
T
DI
V2
SC
H,
T
DI
V2
SC
L
Setup Time of SDIx Data Input
to SCKx Edge
to SCKx Edge
10
—
—
ns
—
SP41
T
SC
H2
DI
L,
T
SC
L2
DI
L
Hold Time of SDIx Data Input
to SCKx Edge
to SCKx Edge
10
—
—
ns
—
Note 1:
These parameters are characterized, but not tested in manufacturing.
2:
Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
and are not tested.
3:
The minimum clock period for SCKx is 40 ns. Therefore, the clock generated in Master mode must not
violate this specification.
violate this specification.
4:
Assumes 50 pF load on all SPIx pins.
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
SP11
SP10
SP40 SP41
SP21
SP20
SP35
SP20
SP21
MSb
LSb
Bit 14 - - - - - -1
MSb In
LSb In
Bit 14 - - - -1
SP30
SP31
Note: Refer to
for load conditions.