Microchip Technology TDGL002 - chipKIT Uno32 Development Board TDGL002 TDGL002 Data Sheet

Product codes

TDGL002

PIC32MX3XX/4XX

DS61143H

-page 60

2011 Microchip T

chnolo

y Inc.

TABLE 4-11:

UART1-2 REGISTERS MAP

irtual Address

(BF80_#

)

Regis

ter

Bit Range

Bits

All

set

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

6000 U1MODE

(1)

31:16

—

0000

15:0

—

SIDL

IREN

RTSMD

—

UEN<1:0>

WAKE

LPBACK

ABAUD

RXINV

BRGH

PDSEL<1:0>

STSEL

0000

6010

U1STA

(1)

31:16

—

ADM_EN

ADDR<7:0>

0000

15:0

UTXISEL<1:0>

UTXINV

URXEN

UTXBRK

UTXEN

UTXBF

TRMT

URXISEL<1:0>

ADDEN

RIDLE

PERR

FERR

OERR

URXDA

0110

6020

U1TXREG

31:16

—

0000

15:0

—

TX8

Transmit Register

0000

6030

U1RXREG

31:16

—

0000

15:0

—

RX8

Receive Register

0000

6040

U1BRG

(1)

31:16

—

0000

15:0

BRG<15:0>

0000

6200 U2MODE

(1)

31:16

—

0000

15:0

—

SIDL

IREN

RTSMD

—

UEN<1:0>

WAKE

LPBACK

ABAUD

RXINV

BRGH

PDSEL<1:0>

STSEL

0000

6210

U2STA

(1)

31:16

—

ADM_EN

ADDR<7:0>

0000

15:0

UTXISEL<1:0>

UTXINV

URXEN

UTXBRK

UTXEN

UTXBF

TRMT

URXISEL<1:0>

ADDEN

RIDLE

PERR

FERR

OERR

URXDA

0110

6220

U2TXREG

31:16

—

0000

15:0

—

TX8

Transmit Register

0000

6230

U2RXREG

31:16

—

0000

15:0

—

RX8

Receive Register

0000

6240

U2BRG

(1)

31:16

—

0000

15:0

BRG<15:0>

0000

Legend:

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note

This register has corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See

Section 12.1.1 “CLR, SET and INV Registers”

for more information.