Microchip Technology MA330016 Data Sheet
© 2007-2011 Microchip Technology Inc.
DS70290J-page 141
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
12.0 TIMER2/3 FEATURE
The Timer2/3 feature has 32-bit timers that can also be
configured as two independent 16-bit timers with
selectable operating modes.
As a 32-bit timer, the Timer2/3 feature permits
operation in three modes:
• Two Independent 16-bit timers (Timer2 and
configured as two independent 16-bit timers with
selectable operating modes.
As a 32-bit timer, the Timer2/3 feature permits
operation in three modes:
• Two Independent 16-bit timers (Timer2 and
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
Asynchronous Counter mode)
• Single 32-bit timer (Timer2/3)
• Single 32-bit synchronous counter (Timer2/3)
The Timer2/3 feature also supports:
• Timer gate operation
• Selectable Prescaler Settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit Period Register Match
• Time Base for Input Capture and Output Compare
• Single 32-bit synchronous counter (Timer2/3)
The Timer2/3 feature also supports:
• Timer gate operation
• Selectable Prescaler Settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit Period Register Match
• Time Base for Input Capture and Output Compare
Modules (Timer2 and Timer3 only)
• ADC1 Event Trigger (Timer2/3 only)
Individually, all eight of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the event trigger. The
operating modes and enabled features are determined
by setting the appropriate bit(s) in the T2CON and
T3CON registers. T2CON registers are shown in
generic form in
Individually, all eight of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the event trigger. The
operating modes and enabled features are determined
by setting the appropriate bit(s) in the T2CON and
T3CON registers. T2CON registers are shown in
generic form in
. T3CON registers are
.
For 32-bit timer/counter operation, Timer2 is the least
significant word (lsw), and Timer3 is the most
significant word (msw) of the 32-bit timers.
significant word (lsw), and Timer3 is the most
significant word (msw) of the 32-bit timers.
12.1
32-Bit Operation
To configure the Timer2/3 feature for 32-bit operation:
1.
1.
Set the corresponding T32 control bit.
2.
Select the prescaler ratio for Timer2 using the
TCKPS<1:0> bits.
TCKPS<1:0> bits.
3.
Set the Clock and Gating modes using the
corresponding TCS and TGATE bits.
corresponding TCS and TGATE bits.
4.
Load the timer period value. PR3 contains the
most significant word of the value, while PR2
contains the least significant word.
most significant word of the value, while PR2
contains the least significant word.
5.
If interrupts are required, set the interrupt enable
bit, T3IE. Use the priority bits T3IP<2:0> to set
the interrupt priority. While Timer2 controls the
timer, the interrupt appears as a Timer3 inter-
rupt.
bit, T3IE. Use the priority bits T3IP<2:0> to set
the interrupt priority. While Timer2 controls the
timer, the interrupt appears as a Timer3 inter-
rupt.
6.
Set the corresponding TON bit.
The timer value at any point is stored in the register pair
TMR3:TMR2. TMR3 always contains the most
significant word of the count, while TMR2 contains the
least significant word.
To configure any of the timers for individual 16-bit
operation:
1.
TMR3:TMR2. TMR3 always contains the most
significant word of the count, while TMR2 contains the
least significant word.
To configure any of the timers for individual 16-bit
operation:
1.
Clear the T32 bit corresponding to that timer.
2.
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
TCKPS<1:0> bits.
3.
Set the Clock and Gating modes using the TCS
and TGATE bits.
and TGATE bits.
4.
Load the timer period value into the PRx
register.
register.
5.
If interrupts are required, set the interrupt enable
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
6.
Set the TON bit.
Note 1: This data sheet summarizes the features
of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 11. “Timers” (DS70205) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip web site (
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 11. “Timers” (DS70205) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip web site (
www.microchip.com
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
Note:
For 32-bit operation, T3CON control bits
are ignored. Only T2CON control bit is
used for setup and control. Timer2 clock
and gate inputs are used for the 32-bit
timer modules, but an interrupt is
generated with the Timer3 interrupt flags.
are ignored. Only T2CON control bit is
used for setup and control. Timer2 clock
and gate inputs are used for the 32-bit
timer modules, but an interrupt is
generated with the Timer3 interrupt flags.