Microchip Technology MA330016 Data Sheet

Page of 300
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
DS70290J-page 190
© 2007-2011 Microchip Technology Inc.
TABLE 19-2:
CONFIGURATION BITS DESCRIPTION
Bit Field
Register
RTSP 
Effect
Description
BWRP
FBS
Immediate Boot Segment Program Flash Write Protection
1 = Boot segment may be written
0 = Boot segment is write-protected
BSS<2:0>
FBS
Immediate dsPIC33FJ32GP202 and dsPIC33FJ32GP204 Devices Only
Boot Segment Program Flash Code Protection Size
X11 = No Boot program Flash segment
Boot space is 768 Instruction Words (except interrupt vectors)
110 = Standard security; boot program Flash segment ends at 0x0007FE
010 = High security; boot program Flash segment ends at 0x0007FE
Boot space is 3840 Instruction Words (except interrupt vectors)
101 = Standard security; boot program Flash segment, ends at 0x001FFE
001 = High security; boot program Flash segment ends at 0x001FFE
Boot space is 7936 Instruction Words (except interrupt vectors)
100 = Standard security; boot program Flash segment ends at 0x003FFE
000 = High security; boot program Flash segment ends at 0x003FFE
BSS<2:0>
FBS
Immediate dsPIC33FJ16GP304 Devices Only
Boot Segment Program Flash Code Protection Size
X11 = No Boot program Flash segment
Boot space is 768 Instruction Words (except interrupt vectors)
110 = Standard security; boot program Flash segment ends at 0x0007FE
010 = High security; boot program Flash segment ends at 0x0007FE
Boot space is 3840 Instruction Words (except interrupt vectors)
101 = Standard security; boot program Flash segment, ends at 0x001FFE
001 = High security; boot program Flash segment ends at 0x001FFE
Boot space is 5376 Instruction Words (except interrupt vectors)
100 = Standard security; boot program Flash segment ends at 0x002BFE
000 = High security; boot program Flash segment ends at 0x002BFE
GSS<1:0>
FGS
Immediate General Segment Code-Protect bit
11 = User program memory is not code-protected
10 = Standard security
0x
 
= High security
GWRP
FGS
Immediate General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
IESO
FOSCSEL Immediate Two-speed Oscillator Start-up Enable bit
1 = Start-up device with FRC, then automatically switch to the    
       user-selected oscillator source when ready
0 = Start-up device with user-selected oscillator source
FNOSC<2:0>
FOSCSEL
If clock 
switch is 
enabled, 
RTSP 
effect is 
on any 
device 
Reset; 
otherwise, 
Immediate
Initial Oscillator Source Selection bits
111 = Internal Fast RC (FRC) oscillator with postscaler
110 = Internal Fast RC (FRC) oscillator with divide-by-16
101 = LPRC oscillator
100 = Secondary (LP) oscillator
011 = Primary (XT, HS, EC) oscillator with PLL
010 = Primary (XT, HS, EC) oscillator
001 = Internal Fast RC (FRC) oscillator with PLL
000 = FRC oscillator