Microchip Technology MA330016 Data Sheet
© 2007-2011 Microchip Technology Inc.
DS70290J-page 29
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
4.0
MEMORY ORGANIZATION
The dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 architecture features separate
program and data memory spaces and buses. This
architecture also allows the direct access of program
memory from the data space during code execution.
dsPIC33FJ16GP304 architecture features separate
program and data memory spaces and buses. This
architecture also allows the direct access of program
memory from the data space during code execution.
4.1
Program Address Space
The program address memory space of the
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices is 4M instructions. The space is addressable by a
24-bit value derived either from the 23-bit Program Counter
(PC) during program execution, or from table operation
or data space remapping as described in
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices is 4M instructions. The space is addressable by a
24-bit value derived either from the 23-bit Program Counter
(PC) during program execution, or from table operation
or data space remapping as described in
User application access to the program memory space is
restricted to the lower half of the address range (0x000000
to 0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to the
Configuration bits and Device ID sections of the
configuration memory space.
The memory maps for the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 devices are shown in
restricted to the lower half of the address range (0x000000
to 0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to the
Configuration bits and Device ID sections of the
configuration memory space.
The memory maps for the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 devices are shown in
FIGURE 4-1:
PROGRAM MEMORY FOR dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
DEVICES
DEVICES
Note:
This data sheet summarizes the features
of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 4. “Program Memory”
(DS70202) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(
of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 4. “Program Memory”
(DS70202) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(
www.microchip.com
).
Reset Address
0x000000
0x0000FE
0x000002
0x000100
Device Configuration
User Program
Flash Memory
0x005800
0x0057FE
(11264 instructions)
0x800000
0xF80000
Registers
0xF80017
0xF80018
DEVID (2)
0xFEFFFE
0xFF0000
0xFFFFFE
0xFFFFFE
0xF7FFFE
Unimplemented
(Read ‘0’s)
GOTO Instruction
0x000004
Reserved
0x7FFFFE
Reserved
0x000200
0x0001FE
0x000104
Alternate Vector Table
Reserved
Interrupt Vector Table
dsPIC33FJ32GP202/204
Conf
ig
ur
at
ion Memor
y
S
pace
User
Memor
y S
pace
Reset Address
0x000000
0x0000FE
0x000002
0x000100
Device Configuration
User Program
Flash Memory
0x002C00
0x002BFE
(5632 instructions)
0x800000
0xF80000
Registers
0xF80017
0xF80018
DEVID (2)
0xFEFFFE
0xFF0000
0xFFFFFE
0xFFFFFE
0xF7FFFE
Unimplemented
(Read ‘0’s)
GOTO Instruction
0x000004
Reserved
0x7FFFFE
Reserved
0x000200
0x0001FE
0x000104
Alternate Vector Table
Reserved
Interrupt Vector Table
dsPIC33FJ16GP304
Conf
ig
ur
at
ion Memor
y
S
pace
User
Memor
y S
pace