Microchip Technology MA330011 Data Sheet
©
2007 Microchip Technology Inc.
Preliminary
DS70165E-page 123
dsPIC33F
REGISTER 6-24:
IPC9: INTERRUPT PRIORITY CONTROL REGISTER 9
U-0
R/W-1
R/W-0
R/W-0
U-0
R/W-1
R/W-0
R/W-0
—
IC5IP<2:0>
—
IC4IP<2:0>
bit 15
bit 8
U-0
R/W-1
R/W-0
R/W-0
U-0
R/W-1
R/W-0
R/W-0
—
IC3IP<2:0>
—
DMA3IP<2:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented: Read as ‘
0
’
bit 14-12
IC5IP<2:0>: Input Capture Channel 5 Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
•
•
•
•
•
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 11
Unimplemented: Read as ‘
0
’
bit 10-8
IC4IP<2:0>: Input Capture Channel 4 Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
•
•
•
•
•
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 7
Unimplemented: Read as ‘
0
’
bit 6-4
IC3IP<2:0>: Input Capture Channel 3 Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
•
•
•
•
•
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 3
Unimplemented: Read as ‘
0
’
bit 2-0
DMA3IP<2:0>: DMA Channel 3 Data Transfer Complete Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
•
•
•
•
•
001
= Interrupt is priority 1
000
= Interrupt source is disabled