Microchip Technology MA330011 Data Sheet

Page of 370
©
 2007 Microchip Technology Inc.
Preliminary
DS70165E-page 207
dsPIC33F
FIGURE 17-2:
SPI MASTER/SLAVE CONNECTION
FIGURE 17-3:
SPI MASTER, FRAME MASTER CONNECTION DIAGRAM
FIGURE 17-4:
SPI MASTER, FRAME SLAVE CONNECTION DIAGRAM
Serial Receive Buffer
(SPIxRXB)
LSb
MSb
SDIx
SDOx
PROCESSOR 2 (SPI Slave)
SCKx
SSx
(1)
Serial Transmit Buffer
(SPIxTXB)
Serial Receive Buffer
(SPIxRXB)
Shift Register
(SPIxSR)
MSb
LSb
SDOx
SDIx
PROCESSOR 1 (SPI Master)
Serial Clock
(SSEN (SPIxCON1<7>) = 
1
 and MSTEN (SPIxCON1<5>) = 
0
)
Note
1:Using the SSx pin in Slave mode of operation is optional.
2:
User must write transmit data to/read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
SCKx
Serial Transmit Buffer
(SPIxTXB)
(MSTEN (SPIxCON1<5>) = 
1
)
SPI Buffer
(SPIxBUF)
(2)
SPI Buffer
(SPIxBUF)
(2)
Shift Register
(SPIxSR)
SDOx
SDIx
dsPIC33F
Serial Clock
SSx
SCKx
Frame Sync
Pulse
SDIx
SDOx
PROCESSOR 2
SSx
SCKx
(SPI Slave, Frame Slave)
SDOx
SDIx
dsPIC33F
Serial Clock
SSx
SCKx
Frame Sync
Pulse
SDIx
SDOx
PROCESSOR 2
SSx
SCKx
(SPI Master, Frame Slave)