Microchip Technology MA330011 Data Sheet
dsPIC33F
DS70165E-page 280
Preliminary
©
2007 Microchip Technology Inc.
bit 3
SIMSAM: Simultaneous Sample Select bit (only applicable when CHPS<1:0> =
01
or
1x
)
When AD12B =
1
, SIMSAM is: U-0, Unimplemented, Read as ‘
0
’
1
= Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS<1:0> =
1x
); or
Samples CH0 and CH1 simultaneously (when CHPS<1:0> =
01
)
0
= Samples multiple channels individually in sequence
bit 2
ASAM: ADC Sample Auto-Start bit
1
= Sampling begins immediately after last conversion. SAMP bit is auto-set.
0
= Sampling begins when SAMP bit is set
bit 1
SAMP: ADC Sample Enable bit
1
= ADC sample/hold amplifiers are sampling
0
= ADC sample/hold amplifiers are holding
If ASAM =
0
, software may write ‘
1
’ to begin sampling. Automatically set by hardware if ASAM =
1
.
If SSRC =
000
, software may write ‘
0
’ to end sampling and start conversion. If SSRC
≠ 000
,
automatically cleared by hardware to end sampling and start conversion.
bit 0
DONE: ADC Conversion Status bit
1
= ADC conversion cycle is completed.
0
= ADC conversion not started or in progress
Automatically set by hardware when ADC conversion is complete. Software may write ‘
0
’ to clear
DONE status (software not allowed to write ‘
1
’). Clearing this bit will NOT affect any operation in
progress. Automatically cleared by hardware at start of a new conversion.
REGISTER 22-1:
ADxCON1: ADCx CONTROL REGISTER 1 (CONTINUED)(where x = 1 or 2)