Microchip Technology MA330011 Data Sheet

Microchip Technology

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DS7

0165E-page

46

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TABLE 3-1:

CPU CORE REGISTERS MAP

SFR Name

SFR

Addr

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

WREG0

0000

Working Register 0

0000

WREG1

0002

Working Register 1

0000

WREG2

0004

Working Register 2

0000

WREG3

0006

Working Register 3

0000

WREG4

0008

Working Register 4

0000

WREG5

000A

Working Register 5

0000

WREG6

000C

Working Register 6

0000

WREG7

000E

Working Register 7

0000

WREG8

0010

Working Register 8

0000

WREG9

0012

Working Register 9

0000

WREG10

0014

Working Register 10

0000

WREG11

0016

Working Register 11

0000

WREG12

0018

Working Register 12

0000

WREG13

001A

Working Register 13

0000

WREG14

001C

Working Register 14

0000

WREG15

001E

Working Register 15

0800

SPLIM

0020

Stack Pointer Limit Register

xxxx

PCL

002E

Program Counter Low Word Register

0000

PCH

0030

—

—

—

—

—

—

—

—

Program Counter High Byte Register

0000

TBLPAG

0032

—

—

—

—

—

—

—

—

Table Page Address Pointer Register

0000

PSVPAG

0034

—

—

—

—

—

—

—

—

Program Memory Visibility Page Address Pointer Register

0000

RCOUNT

0036

Repeat Loop Counter Register

xxxx

DCOUNT

0038

DCOUNT<15:0>

xxxx

DOSTARTL

003A

DOSTARTL<15:1>

0

xxxx

DOSTARTH

003C

—

—

—

—

—

—

—

—

—

—

DOSTARTH<5:0>

00xx

DOENDL

003E

DOENDL<15:1>

0

xxxx

DOENDH

0040

—

—

—

—

—

—

—

—

—

—

DOENDH

00xx

SR

0042

OA

OB

SA

SB

OAB

SAB

DA

DC

IPL2

IPL1

IPL0

RA

N

OV

Z

C

0000

CORCON

0044

—

—

—

US

EDT

DL<2:0>

SATA

SATB

SATDW

ACCSAT

IPL3

PSV

RND

IF

0000

MODCON

0046

XMODEN

YMODEN

—

—

BWM<3:0>

YWM<3:0>

XWM<3:0>

0000

XMODSRT

0048

XS<15:1>

0

xxxx

XMODEND

004A

XE<15:1>

1

xxxx

YMODSRT

004C

YS<15:1>

0

xxxx

YMODEND

004E

YE<15:1>

1

xxxx

XBREV

0050

BREN

XB<14:0>

xxxx

DISICNT

0052

—

—

Disable Interrupts Counter Register

xxxx

BSRAM

0750

—

—

—

—

—

—

—

—

—

—

—

—

—

IW_BSR

IR_BSR

RL_BSR

0000

SSRAM

0752

—

—

—

—

—

—

—

—

—

—

—

—

—

IW_SSR

IR_SSR

RL_SSR

0000

Legend:

x

= unknown value on Reset, — = unimplemented, read as ‘

0

’. Reset values are shown in hexadecimal.