Microchip Technology AC244049 Data Sheet
© 2009 Microchip Technology Inc.
DS41341E-page 101
PIC16F72X/PIC16LF72X
TABLE 9-1:
ADC CLOCK PERIOD (T
AD
) V
S
. DEVICE OPERATING FREQUENCIES
FIGURE 9-2:
ANALOG-TO-DIGITAL CONVERSION T
AD
CYCLES
ADC Clock Period (T
AD
)
Device Frequency (F
OSC
)
ADC
Clock Source
ADCS<2:0>
20 MHz
16 MHz
8 MHz
4 MHz
1 MHz
Fosc/2
000
100 ns
(2)
125 ns
(2)
250 ns
(2)
500 ns
(2)
2.0
μs
Fosc/4
100
200 ns
(2)
250 ns
(2)
500 ns
(2)
1.0
μs
4.0
μs
Fosc/8
001
400 ns
(2)
0.5
μs
(2)
1.0
μs
2.0
μs
8.0
μs
(3)
Fosc/16
101
800 ns
1.0
μs
2.0
μs
4.0
μs
16.0
μs
(3)
Fosc/32
010
1.6
μs
2.0
μs
4.0
μs
8.0
μs
(3)
32.0
μs
(3)
Fosc/64
110
3.2
μs
4.0
μs
8.0
μs
(3)
16.0
μs
(3)
64.0
μs
(3)
F
RC
x11
1.0-6.0
μs
(1,4)
1.0-6.0
μs
(1,4)
1.0-6.0
μs
(1,4)
1.0-6.0
μs
(1,4)
1.0-6.0
μs
(1,4)
Legend: Shaded cells are outside of recommended range.
Note 1:
The F
RC
source has a typical T
AD
time of 1.6
μs for V
DD
.
2:
These values violate the minimum required T
AD
time.
3:
For faster conversion times, the selection of another clock source is recommended.
4:
When the device frequency is greater than 1 MHz, the F
RC
clock source is only recommended if the
conversion will be performed during Sleep.
T
AD
1
T
AD
2
T
AD
3
T
AD
4
T
AD
5
T
AD
6
T
AD
7
T
AD
8
T
AD
9
Set GO/DONE bit
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
b7
b6
b5
b4
b3
b2
b1
b0
Tcy to T
AD
Conversion Starts
ADRES register is loaded,
GO/DONE bit is cleared,
ADIF bit is set,
Holding capacitor is connected to analog input
GO/DONE bit is cleared,
ADIF bit is set,
Holding capacitor is connected to analog input
T
AD
0