Intel Core™ 2 Duo U7600 U7600 User Manual

Specification Update 

 7 

The Intel Core 2 Duo processor and Intel Core 2 Extreme processor on 45-nm process 

stepping can be identified by the following register contents: 

 

 

31:28 27:20 19:16 15:14  13:12  11:8  7:4 

3:0 

 0000000b 

0001b   00b 

0110b 

0111b 

XXXXb 

NOTES:  

1. 

The Extended Family, Bits [27:20] are used in conjunction with the Family Code, 

specified in bits [11:8], to indicate whether the processor belongs to the Intel386®, 

Intel486®, Pentium®, Pentium Pro, Pentium 4, or Intel Core processor family.  

2. 

The Extended Model, Bits [19:16] in conjunction with the Model Number, specified in 

Bits [7:4], are used to identify the model of the processor within the processor’s family. 

3. 

The Processor Type, specified in Bits [13:12] indicates whether the processor is an 

original OEM processor, an OverDrive® processor, or a dual processor (capable of being 

used in a dual-processor system).  

4. 

The Family Code corresponds to Bits [11:8] of the EDX register after RESET, Bits [11:8] 

of the EAX register after the CPUID instruction is executed with a 1 in the EAX register, 

and the generation field of the Device ID register accessible through Boundary Scan. 

5. 

The Model Number corresponds to Bits [7:4] of the EDX register after RESET, Bits [7:4] 

of the EAX register after the CPUID instruction is executed with a 1 in the EAX register, 

and the model field of the Device ID register accessible through Boundary Scan. 

6. 

The Stepping ID in Bits [3:0] indicates the revision number of that model. See Table 1 

for the processor stepping ID number in the CPUID information. 

Note:  When EAX is initialized to a value of 1, the CPUID instruction returns the Extended 

Family, Extended Model, Type, Family, Model and Stepping value in the EAX register. 
Note that the EDX processor signature value after reset is equivalent to the processor 
signature output value in the EAX register. 

Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX 

registers after the CPUID instruction is executed with a 2 in the EAX register.