Microchip Technology MCP3421DM-WS Data Sheet
PIC18F2455/2550/4455/4550
DS39632E-page 166
© 2009 Microchip Technology Inc.
17.2
USB Status and Control
The operation of the USB module is configured and
managed through three control registers. In addition, a
total of 22 registers are used to manage the actual USB
transactions. The registers are:
• USB Control register (UCON)
• USB Configuration register (UCFG)
• USB Transfer Status register (USTAT)
• USB Device Address register (UADDR)
• Frame Number registers (UFRMH:UFRML)
• Endpoint Enable registers 0 through 15 (UEPn)
managed through three control registers. In addition, a
total of 22 registers are used to manage the actual USB
transactions. The registers are:
• USB Control register (UCON)
• USB Configuration register (UCFG)
• USB Transfer Status register (USTAT)
• USB Device Address register (UADDR)
• Frame Number registers (UFRMH:UFRML)
• Endpoint Enable registers 0 through 15 (UEPn)
17.2.1
USB CONTROL REGISTER (UCON)
The USB Control register (Register 17-1) contains bits
needed to control the module behavior during transfers.
The register contains bits that control the following:
• Main USB Peripheral Enable
• Ping-Pong Buffer Pointer Reset
• Control of the Suspend mode
• Packet Transfer Disable
needed to control the module behavior during transfers.
The register contains bits that control the following:
• Main USB Peripheral Enable
• Ping-Pong Buffer Pointer Reset
• Control of the Suspend mode
• Packet Transfer Disable
In addition, the USB Control register contains a status bit,
SE0 (UCON<5>), which is used to indicate the occur-
rence of a single-ended zero on the bus. When the USB
module is enabled, this bit should be monitored to deter-
mine whether the differential data lines have come out of
a single-ended zero condition. This helps to differentiate
the initial power-up state from the USB Reset signal.
The overall operation of the USB module is controlled by
the USBEN bit (UCON<3>). Setting this bit activates the
module and resets all of the PPBI bits in the Buffer
Descriptor Table to ‘0’. This bit also activates the on-chip
voltage regulator (if the VREGEN Configuration bit is
set) and connects internal pull-up resistors, if they are
enabled. Thus, this bit can be used as a soft
attach/detach to the USB. Although all status and control
bits are ignored when this bit is clear, the module needs
to be fully preconfigured prior to setting this bit.
SE0 (UCON<5>), which is used to indicate the occur-
rence of a single-ended zero on the bus. When the USB
module is enabled, this bit should be monitored to deter-
mine whether the differential data lines have come out of
a single-ended zero condition. This helps to differentiate
the initial power-up state from the USB Reset signal.
The overall operation of the USB module is controlled by
the USBEN bit (UCON<3>). Setting this bit activates the
module and resets all of the PPBI bits in the Buffer
Descriptor Table to ‘0’. This bit also activates the on-chip
voltage regulator (if the VREGEN Configuration bit is
set) and connects internal pull-up resistors, if they are
enabled. Thus, this bit can be used as a soft
attach/detach to the USB. Although all status and control
bits are ignored when this bit is clear, the module needs
to be fully preconfigured prior to setting this bit.
Note:
When disabling the USB module, make
sure the SUSPND bit (UCON<1>) is clear
prior to clearing the USBEN bit. Clearing
the USBEN bit when the module is in the
suspended state may prevent the module
from fully powering down.
sure the SUSPND bit (UCON<1>) is clear
prior to clearing the USBEN bit. Clearing
the USBEN bit when the module is in the
suspended state may prevent the module
from fully powering down.
REGISTER 17-1:
UCON: USB CONTROL REGISTER
U-0
R/W-0
R-x
R/C-0
R/W-0
R/W-0
R/W-0
U-0
—
PPBRST
SE0
PKTDIS
USBEN
RESUME
SUSPND
—
bit 7
bit 0
Legend:
C = Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Ping-Pong Buffer Pointers to the Even Buffer Descriptor (BD) banks
0 = Ping-Pong Buffer Pointers not being reset
1 = Reset all Ping-Pong Buffer Pointers to the Even Buffer Descriptor (BD) banks
0 = Ping-Pong Buffer Pointers not being reset
bit 5
SE0: Live Single-Ended Zero Flag bit
1 = Single-ended zero active on the USB bus
0 = No single-ended zero detected
1 = Single-ended zero active on the USB bus
0 = No single-ended zero detected
bit 4
PKTDIS: Packet Transfer Disable bit
1 = SIE token and packet processing disabled, automatically set when a SETUP token is received
0 = SIE token and packet processing enabled
1 = SIE token and packet processing disabled, automatically set when a SETUP token is received
0 = SIE token and packet processing enabled
bit 3
USBEN: USB Module Enable bit
1 = USB module and supporting circuitry enabled (device attached)
0 = USB module and supporting circuitry disabled (device detached)
1 = USB module and supporting circuitry enabled (device attached)
0 = USB module and supporting circuitry disabled (device detached)
bit 2
RESUME: Resume Signaling Enable bit
1 = Resume signaling activated
0 = Resume signaling disabled
1 = Resume signaling activated
0 = Resume signaling disabled
bit 1
SUSPND: Suspend USB bit
1 = USB module and supporting circuitry in Power Conserve mode, SIE clock inactive
0 = USB module and supporting circuitry in normal operation, SIE clock clocked at the configured rate
1 = USB module and supporting circuitry in Power Conserve mode, SIE clock inactive
0 = USB module and supporting circuitry in normal operation, SIE clock clocked at the configured rate
bit 0
Unimplemented: Read as ‘0’