Microchip Technology MCP3421DM-WS Data Sheet
© 2009 Microchip Technology Inc.
DS39632E-page 279
PIC18F2455/2550/4455/4550
22.9
Analog Input Connection
Considerations
Considerations
A simplified circuit for an analog input is shown in
Figure 22-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
Figure 22-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
DD
and V
SS
. The analog input, therefore, must be between
V
SS
and V
DD
. If the input voltage deviates from this
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latch-up condition may
occur. A maximum source impedance of 10 k
diodes is forward biased and a latch-up condition may
occur. A maximum source impedance of 10 k
Ω is
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
FIGURE 22-4:
COMPARATOR ANALOG INPUT MODEL
TABLE 22-1:
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
VA
R
S
< 10k
A
IN
C
PIN
5 pF
V
DD
V
T
= 0.6V
V
T
= 0.6V
R
IC
I
LEAKAGE
±500 nA
V
SS
Legend:
C
PIN
= Input Capacitance
V
T
= Threshold
Voltage
I
LEAKAGE
= Leakage Current at the pin due to various junctions
R
IC
= Interconnect Resistance
R
S
= Source
Impedance
VA
= Analog
Voltage
Comparator
Input
Input
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
CMCON
C2OUT
C1OUT
C2INV
C1INV
CIS
CM2
CM1
CM0
CVRCON
CVREN
CVROE
CVRR
CVRSS
CVR3
CVR2
CVR1
CVR0
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
PIR2
OSCFIF
CMIF
USBIF
EEIF
BCLIF
HLVDIF
TMR3IF
CCP2IF
PIE2
OSCFIE
CMIE
USBIE
EEIE
BCLIE
HLVDIE
TMR3IE
CCP2IE
IPR2
OSCFIP
CMIP
USBIP
EEIP
BCLIP
HLVDIP
TMR3IP
CCP2IP
PORTA
—
RA6
(1)
RA5
RA4
RA3
RA2
RA1
RA0
LATA
—
LATA6
(1)
LATA5
LATA4
LATA3
LATA2
LATA1
LATA0
TRISA
—
TRISA6
(1)
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module.
Note 1:
Note 1:
PORTA<6> and its direction and latch bits are individually configured as port pins based on various
oscillator modes. When disabled, these bits read as ‘0’.
oscillator modes. When disabled, these bits read as ‘0’.