Microchip Technology MCP3421DM-WS Data Sheet
PIC18F2455/2550/4455/4550
DS39632E-page 28
© 2009 Microchip Technology Inc.
2.2.5.2
OSCTUNE Register
The internal oscillator’s output has been calibrated at
the factory but can be adjusted in the user’s applica-
tion. This is done by writing to the OSCTUNE register
(Register 2-1). The tuning sensitivity is constant
throughout the tuning range.
The INTOSC clock will stabilize within 1 ms. Code exe-
cution continues during this shift. There is no indication
that the shift has occurred.
The OSCTUNE register also contains the INTSRC bit.
The INTSRC bit allows users to select which internal
oscillator provides the clock source when the 31 kHz
frequency option is selected. This is covered in greater
detail in Section 2.4.1 “Oscillator Control Register”.
the factory but can be adjusted in the user’s applica-
tion. This is done by writing to the OSCTUNE register
(Register 2-1). The tuning sensitivity is constant
throughout the tuning range.
The INTOSC clock will stabilize within 1 ms. Code exe-
cution continues during this shift. There is no indication
that the shift has occurred.
The OSCTUNE register also contains the INTSRC bit.
The INTSRC bit allows users to select which internal
oscillator provides the clock source when the 31 kHz
frequency option is selected. This is covered in greater
detail in Section 2.4.1 “Oscillator Control Register”.
2.2.5.3
Internal Oscillator Output Frequency
and Drift
and Drift
The internal oscillator block is calibrated at the factory
to produce an INTOSC output frequency of 8.0 MHz.
However, this frequency may drift as V
to produce an INTOSC output frequency of 8.0 MHz.
However, this frequency may drift as V
DD
or tempera-
ture changes, which can affect the controller operation
in a variety of ways.
The low-frequency INTRC oscillator operates indepen-
dently of the INTOSC source. Any changes in INTOSC
across voltage and temperature are not necessarily
reflected by changes in INTRC and vice versa.
in a variety of ways.
The low-frequency INTRC oscillator operates indepen-
dently of the INTOSC source. Any changes in INTOSC
across voltage and temperature are not necessarily
reflected by changes in INTRC and vice versa.
REGISTER 2-1:
OSCTUNE: OSCILLATOR TUNING REGISTER
R/W-0 U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
INTSRC
—
—
TUN4
TUN3
TUN2
TUN1
TUN0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
INTSRC: Internal Oscillator Low-Frequency Source Select bit
1 = 31.25 kHz device clock derived from 8 MHz INTOSC source (divide-by-256 enabled)
0 = 31 kHz device clock derived directly from INTRC internal oscillator
1 = 31.25 kHz device clock derived from 8 MHz INTOSC source (divide-by-256 enabled)
0 = 31 kHz device clock derived directly from INTRC internal oscillator
bit 6-5
Unimplemented: Read as ‘0’
bit 4-0
TUN4:TUN0: Frequency Tuning bits
01111 = Maximum frequency
•
01111 = Maximum frequency
•
•
•
•
00001
00000 = Center frequency. Oscillator module is running at the calibrated frequency.
11111
•
00000 = Center frequency. Oscillator module is running at the calibrated frequency.
11111
•
•
•
•
10000 = Minimum frequency