Microchip Technology MCP3421DM-WS Data Sheet

DS39632E-page 299

PIC18F2455/2550/4455/4550

REGISTER 25-7:

CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)

U-0

R/C-1

—

CP3

(1)

CP2

CP1

CP0

bit 7

bit 0

Legend:
R = Readable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

-n = Value when device is unprogrammed

u = Unchanged from programmed state

bit 7-4

Unimplemented: Read as ‘0’

bit 3

CP3: Code Protection bit

(1)

1 = Block 3 (006000-007FFFh) is not code-protected
0 = Block 3 (006000-007FFFh) is code-protected

bit 2

CP2: Code Protection bit
1 = Block 2 (004000-005FFFh) is not code-protected
0 = Block 2 (004000-005FFFh) is code-protected

bit 1

CP1: Code Protection bit
1 = Block 1 (002000-003FFFh) is not code-protected
0 = Block 1 (002000-003FFFh) is code-protected

bit 0

CP0: Code Protection bit
1 = Block 0 (000800-001FFFh) is not code-protected
0 = Block 0 (000800-001FFFh) is code-protected

Note 1:

Unimplemented in PIC18FX455 devices; maintain this bit set.

REGISTER 25-8:

CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)

R/C-1

U-0

CPD

CPB

—

bit 7

bit 0

Legend:
R = Readable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

-n = Value when device is unprogrammed

u = Unchanged from programmed state

bit 7

CPD: Data EEPROM Code Protection bit
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected

bit 6

CPB: Boot Block Code Protection bit
1 = Boot block (000000-0007FFh) is not code-protected
0 = Boot block (000000-0007FFh) is code-protected

bit 5-0

Unimplemented: Read as ‘0’